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Message-ID: <20250710-qcom_ipq5424_nsscc-v3-5-f149dc461212@quicinc.com>
Date: Thu, 10 Jul 2025 20:28:13 +0800
From: Luo Jie <quic_luoj@...cinc.com>
To: Georgi Djakov <djakov@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Michael Turquette
<mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Anusha Rao
<quic_anusha@...cinc.com>,
Konrad Dybcio <konradybcio@...nel.org>,
"Philipp
Zabel" <p.zabel@...gutronix.de>,
Richard Cochran <richardcochran@...il.com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-pm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-clk@...r.kernel.org>, <netdev@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <quic_kkumarcs@...cinc.com>,
<quic_linchen@...cinc.com>, <quic_leiwei@...cinc.com>,
<quic_pavir@...cinc.com>, <quic_suruchia@...cinc.com>,
Luo Jie
<quic_luoj@...cinc.com>
Subject: [PATCH v3 05/10] dt-bindings: clock: ipq9574: Rename NSS CC source
clocks to drop rate
Drop the clock rate suffix from the NSS Clock Controller clock names for
PPE and NSS clocks. A generic name allows for easier extension of support
to additional SoCs that utilize same hardware design.
Signed-off-by: Luo Jie <quic_luoj@...cinc.com>
---
.../devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
index 17252b6ea3be..b9ca69172adc 100644
--- a/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
@@ -25,8 +25,8 @@ properties:
clocks:
items:
- description: Board XO source
- - description: CMN_PLL NSS 1200MHz (Bias PLL cc) clock source
- - description: CMN_PLL PPE 353MHz (Bias PLL ubi nc) clock source
+ - description: CMN_PLL NSS (Bias PLL cc) clock source
+ - description: CMN_PLL PPE (Bias PLL ubi nc) clock source
- description: GCC GPLL0 OUT AUX clock source
- description: Uniphy0 NSS Rx clock source
- description: Uniphy0 NSS Tx clock source
@@ -42,8 +42,8 @@ properties:
clock-names:
items:
- const: xo
- - const: nss_1200
- - const: ppe_353
+ - const: nss
+ - const: ppe
- const: gpll0_out
- const: uniphy0_rx
- const: uniphy0_tx
@@ -82,8 +82,8 @@ examples:
<&uniphy 5>,
<&gcc GCC_NSSCC_CLK>;
clock-names = "xo",
- "nss_1200",
- "ppe_353",
+ "nss",
+ "ppe",
"gpll0_out",
"uniphy0_rx",
"uniphy0_tx",
--
2.34.1
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