[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20250711-enable-iq9-dp-v1-1-6d381e105473@oss.qualcomm.com>
Date: Fri, 11 Jul 2025 21:13:47 +0530
From: Prahlad Valluru <venkata.valluru@....qualcomm.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Shashank Maurya <quic_ssmaurya@...cinc.com>,
Prahlad Valluru <venkata.valluru@....qualcomm.com>
Subject: [PATCH] arm64: dts: qcom: qcs9075-iq-9075-evk: Enable Display Port
From: Shashank Maurya <quic_ssmaurya@...cinc.com>
Enable DPTX0 and DPTX1 along with their corresponding PHYs for
qcs9075-iq-9075-evk platform.
Signed-off-by: Shashank Maurya <quic_ssmaurya@...cinc.com>
Signed-off-by: Prahlad Valluru <venkata.valluru@....qualcomm.com>
---
arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts | 52 ++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts b/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
index ab161180d1d5a670a68c0903e85f24a91faa2b71..110e08db3ad82e3aa88aa4c4ed4b2beb607385ad 100644
--- a/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
+++ b/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
@@ -252,6 +252,44 @@ vreg_l8e: ldo8 {
};
};
+&mdss0 {
+ status = "okay";
+};
+
+&mdss0_dp0 {
+ status = "okay";
+ pinctrl-0 = <&dp0_hot_plug_det>;
+ pinctrl-names = "default";
+};
+
+&mdss0_dp0_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+};
+
+&mdss0_dp0_phy {
+ status = "okay";
+ vdda-phy-supply = <&vreg_l1c>;
+ vdda-pll-supply = <&vreg_l4a>;
+};
+
+&mdss0_dp1 {
+ status = "okay";
+ pinctrl-0 = <&dp1_hot_plug_det>;
+ pinctrl-names = "default";
+};
+
+&mdss0_dp1_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+};
+
+&mdss0_dp1_phy {
+ status = "okay";
+ vdda-phy-supply = <&vreg_l1c>;
+ vdda-pll-supply = <&vreg_l4a>;
+};
+
&qupv3_id_1 {
status = "okay";
};
@@ -260,6 +298,20 @@ &sleep_clk {
clock-frequency = <32768>;
};
+&tlmm {
+ dp0_hot_plug_det: dp0-hot-plug-det-state {
+ pins = "gpio101";
+ function = "edp0_hot";
+ bias-disable;
+ };
+
+ dp1_hot_plug_det: dp1-hot-plug-det-state {
+ pins = "gpio102";
+ function = "edp1_hot";
+ bias-disable;
+ };
+};
+
&uart10 {
compatible = "qcom,geni-debug-uart";
pinctrl-0 = <&qup_uart10_default>;
---
base-commit: 7f3a635117b377cb90b67757cb46de12ce8aa24e
change-id: 20250711-enable-iq9-dp-addc9c7195c9
prerequisite-message-id: <20250612155437.146925-1-quic_wasimn@...cinc.com>
prerequisite-patch-id: 22eee78c5507c3105e0c74d1128b3db803879d7a
prerequisite-patch-id: cf52fc82e606ab87458339f71596ca31253e91ee
prerequisite-patch-id: 3617ce3b1790bc5b8e50dca6c3ae482759dcc684
Best regards,
--
Prahlad Valluru <venkata.valluru@....qualcomm.com>
Powered by blists - more mailing lists