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Message-ID: <20250711173840.000072f0@huawei.com>
Date: Fri, 11 Jul 2025 17:38:40 +0100
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Li Ming <ming.li@...omail.com>
CC: <dave@...olabs.net>, <dave.jiang@...el.com>, <alison.schofield@...el.com>,
	<vishal.l.verma@...el.com>, <ira.weiny@...el.com>,
	<dan.j.williams@...el.com>, <shiju.jose@...wei.com>,
	<andriy.shevchenko@...ux.intel.com>, <linux-cxl@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6 2/3] cxl/edac: Fix wrong dpa checking for PPR
 operation

On Fri, 11 Jul 2025 11:23:56 +0800
Li Ming <ming.li@...omail.com> wrote:

> Per Table 8-143. "Get Partition Info Output Payload" in CXL r3.2 section
> 8.2.10.9.2.1 "Get Partition Info(Opcode 4100h)", DPA 0 is a valid
> address of a CXL device. However, cxl_do_ppr() considers it as an
> invalid address, so that user will get an -EINVAL when user calls the
> sysfs interface of the edac driver to trigger a Post Package Repair(PPR)
> operation for DPA 0 on a CXL device. The correct implementation should
> be checking if the input DPA is in the DPA range of the CXL device.
> 
> Fixes: be9b359e056a ("cxl/edac: Add CXL memory device soft PPR control feature")
> Signed-off-by: Li Ming <ming.li@...omail.com>
> Tested-by: Shiju Jose <shiju.jose@...wei.com>
> Reviewed-by: Shiju Jose <shiju.jose@...wei.com>
> Reviewed-by: Dave Jiang <dave.jiang@...el.com>
> Reviewed-by: Alison Schofield <alison.schofield@...el.com>
LGTM
Reviewed-by: Jonathan Cameron <jonathan.cameron@...wei.com>

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