linux-kernel - Re: [PATCH v2 2/3] cacheinfo: Add arch hook to compress CPU h/w id into 32 bits for cache-id

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Message-ID: <5147e48d-2376-4b0c-adff-b8663e56f152@redhat.com>
Date: Fri, 11 Jul 2025 14:42:34 +1000
From: Gavin Shan <gshan@...hat.com>
To: James Morse <james.morse@....com>, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 "Rafael J . Wysocki" <rafael@...nel.org>, sudeep.holla@....com,
 Rob Herring <robh@...nel.org>, Ben Horgan <ben.horgan@....com>,
 Jonathan Cameron <jonathan.cameron@...wei.com>,
 Catalin Marinas <catalin.marinas@....com>, WillDeaconwill@...nel.org
Subject: Re: [PATCH v2 2/3] cacheinfo: Add arch hook to compress CPU h/w id
 into 32 bits for cache-id

On 7/5/25 3:38 AM, James Morse wrote:
> Filesystems like resctrl use the cache-id exposed via sysfs to identify
> groups of CPUs. The value is also used for PCIe cache steering tags. On
> DT platforms cache-id is not something that is described in the
> device-tree, but instead generated from the smallest CPU h/w id of the
> CPUs associated with that cache.
> 
> CPU h/w ids may be larger than 32 bits.
> 
> Add a hook to allow architectures to compress the value from the devicetree
> into 32 bits. Returning the same value is always safe as cache_of_set_id()
> will stop if a value larger than 32 bits is seen.
> 
> For example, on arm64 the value is the MPIDR affinity register, which only
> has 32 bits of affinity data, but spread accross the 64 bit field. An
> arch-specific bit swizzle gives a 32 bit value.
> 
> Signed-off-by: James Morse <james.morse@....com>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@...wei.com>
> ---
>   drivers/base/cacheinfo.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
Reviewed-by: Gavin Shan <gshan@...ha.com>