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Message-ID: <20250711-noisy-mellow-reindeer-72a4fe@krzk-bin>
Date: Fri, 11 Jul 2025 10:19:15 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Thierry Reding <thierry.reding@...il.com>
Cc: Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-tegra@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/2] dt-bindings: memory: tegra: Add Tegra264 support
On Thu, Jul 10, 2025 at 12:21:46AM +0200, Thierry Reding wrote:
> From: Sumit Gupta <sumitg@...dia.com>
>
> Add bindings for the Memory Controller (MC) and External Memory
> Controller (EMC) found on the Tegra264 SoC. Tegra264 SoC has a different
> number of interrupt lines for MC sub-units: UCF_SOC, hub, hub common,
> syncpoint and MC channel. The total number of interrupt lines is eight.
> Update maxItems for MC interrupts accordingly.
>
> This also adds a header containing the memory client ID definitions that
> are used by the interconnects property in DT and the tegra_mc_client
> table in the MC driver. These IDs are defined by the hardware, so the
> numbering doesn't start at 0 and contains holes. Also added are the
> stream IDs for various hardware blocks found on Tegra264. These are
> allocated as blocks of 256 IDs and each block can be subdivided for
> additional fine-grained isolation if needed.
>
> Signed-off-by: Sumit Gupta <sumitg@...dia.com>
> [treding@...dia.com: add SMMU stream IDs, squash patches]
> Signed-off-by: Thierry Reding <treding@...dia.com>
> ---
> Changes in v2:
> - add interrupts and interrupt-names constraints for previous chips
> - add missing maxItems for reg property on Tegra264
> - squash memory client IDs and stream IDs patches
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
(also as an Ack)
Best regards,
Krzysztof
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