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Message-ID: <1606591b-5707-48bf-8f60-44063ecf8f1a@kernel.org>
Date: Fri, 11 Jul 2025 10:44:11 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
Cc: andersson@...nel.org, konradybcio@...nel.org, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org, jingoohan1@...il.com,
 mani@...nel.org, lpieralisi@...nel.org, kwilczynski@...nel.org,
 bhelgaas@...gle.com, johan+linaro@...nel.org, vkoul@...nel.org,
 kishon@...nel.org, neil.armstrong@...aro.org, abel.vesa@...aro.org,
 kw@...ux.com, linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
 linux-phy@...ts.infradead.org, qiang.yu@....qualcomm.com,
 quic_krichai@...cinc.com, quic_vbadigan@...cinc.com
Subject: Re: [PATCH v3 2/4] dt-bindings: PCI: qcom,pcie-sa8775p: document
 link_down reset

On 11/07/2025 10:26, Ziyue Zhang wrote:
> 
> On 6/27/2025 3:08 PM, Krzysztof Kozlowski wrote:
>> On Wed, Jun 25, 2025 at 05:00:46PM +0800, Ziyue Zhang wrote:
>>> Each PCIe controller on sa8775p includes 'link_down'reset on hardware,
>>> document it.
>> This is an ABI break, so you need to clearly express it and explain the
>> impact. Following previous Qualcomm feedback we cannot give review to
>> imperfect commits, because this would be precedent to accept such
>> imperfectness in the future.
>>
>> Therefore follow all standard rules about ABI.
>>
>> Best regards,
>> Krzysztof
> 
> Hi Krzysztof
> 
> 
> This does not break the ABI. In the Qualcomm PCIe driver, we use the APIs
> devm_reset_control_array_get_exclusive, reset_control_assert, and

I see in the binding requirement of 1 reset before and after your patch:
requirement of two reset lines.

This is an ABI change. My entire comment stays valid, so don't just
deflect it but resolve it.

Best regards,
Krzysztof

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