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Message-ID: <aHDc72x6HxGhYDys@kekkonen.localdomain>
Date: Fri, 11 Jul 2025 09:44:15 +0000
From: Sakari Ailus <sakari.ailus@...ux.intel.com>
To: David Laight <david.laight.linux@...il.com>
Cc: Arnd Bergmann <arnd@...nel.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Bingbu Cao <bingbu.cao@...el.com>,
Hans Verkuil <hverkuil@...all.nl>, Arnd Bergmann <arnd@...db.de>,
Stanislaw Gruszka <stanislaw.gruszka@...ux.intel.com>,
linux-media@...r.kernel.org, linux-staging@...ts.linux.dev,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] media: staging/ipu7: avoid division by 64-bit value
Hi David,
On Fri, Jul 11, 2025 at 09:23:29AM +0100, David Laight wrote:
> On Wed, 9 Jul 2025 16:56:56 +0200
> Arnd Bergmann <arnd@...nel.org> wrote:
>
> > From: Arnd Bergmann <arnd@...db.de>
> >
> > On 32-bit targets, this causes a link failure:
> >
> > x86_64-linux-ld: drivers/staging/media/ipu7/ipu7-isys-csi-phy.o: in function `ipu7_isys_phy_config':
> > ipu7-isys-csi-phy.c:(.text+0x1509): undefined reference to `__udivdi3'
> >
> > Note that this does not divide a 64-bit number by a 32-bit one as usual,
> > but the other way round, which is something that the compiler should
> > really be able to figure out but does not (as of gcc-15).
> >
> > A few lines higher, a similar division is done using the incorrect div_u64()
> > that truncates the 64-bit divisor to 32 bits.
> >
> > Change both to use the safe but slow div64_u64() helper.
> >
> > Fixes: a516d36bdc3d ("media: staging/ipu7: add IPU7 input system device driver")
> > Signed-off-by: Arnd Bergmann <arnd@...db.de>
> > ---
> > drivers/staging/media/ipu7/ipu7-isys-csi-phy.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/staging/media/ipu7/ipu7-isys-csi-phy.c b/drivers/staging/media/ipu7/ipu7-isys-csi-phy.c
> > index 4407750c7f40..b8c5db7ae300 100644
> > --- a/drivers/staging/media/ipu7/ipu7-isys-csi-phy.c
> > +++ b/drivers/staging/media/ipu7/ipu7-isys-csi-phy.c
> > @@ -734,6 +734,7 @@ static void ipu7_isys_cphy_config(struct ipu7_isys *isys, u8 id, u8 lanes,
> > u16 reg;
> > u16 val;
> > u32 i;
> > + u64 r64;
> > u32 r;
> >
> > if (is_ipu7p5(isys->adev->isp->hw_ver))
> > @@ -806,8 +807,8 @@ static void ipu7_isys_cphy_config(struct ipu7_isys *isys, u8 id, u8 lanes,
> > dwc_phy_write_mask(isys, id, reg, 2, 0, 2);
> > }
> >
> > - deass_thresh = (u16)div_u64_rem(7 * 1000 * 6, mbps * 5U, &r) + 1;
> > - if (r != 0)
> > + deass_thresh = (u16)div64_u64_rem(7 * 1000 * 6, mbps * 5U, &r64) + 1;
> > + if (r64 != 0)
> > deass_thresh++;
>
> While 'mbps' is presumably u64, it can't be big.
> So this can just be:
> deass_threas = roundup(7 * 1000 * 6 / 5, (u32)mbps) + 1;
>
>
> >
> > reg = CORE_DIG_RW_TRIO0_2;
> > @@ -815,8 +816,7 @@ static void ipu7_isys_cphy_config(struct ipu7_isys *isys, u8 id, u8 lanes,
> > dwc_phy_write_mask(isys, id, reg + 0x400 * i,
> > deass_thresh, 0, 7);
> >
> > - delay_thresh =
> > - ((224U - (9U * 7U)) * 1000U) / (5U * mbps) - 7U;
> > + delay_thresh = div64_u64((224U - (9U * 7U)) * 1000U, 5U * mbps) - 7u;
>
> That one just needs a (u32) cast, although the 5 can be moved.
I agree in principle but this should be done separately from fixing the bug
which is what this patch does. mbps is u64 elsewhere, too, and there
doesn't seem to be a need for that.
--
Regards,
Sakari Ailus
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