linux-kernel - [PATCH v2 1/9] riscv: add Andes SoC family Kconfig support

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Message-ID: <20250711133025.2192404-2-ben717@andestech.com>
Date: Fri, 11 Jul 2025 21:30:17 +0800
From: Ben Zong-You Xie <ben717@...estech.com>
To:
CC: <arnd@...db.de>, <paul.walmsley@...ive.com>, <palmer@...belt.com>,
        <aou@...s.berkeley.edu>, <alex@...ti.fr>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>, <tglx@...utronix.de>,
        <daniel.lezcano@...aro.org>, <prabhakar.mahadev-lad.rj@...renesas.com>,
        <devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <soc@...ts.linux.dev>,
        <tim609@...estech.com>, Ben Zong-You Xie <ben717@...estech.com>
Subject: [PATCH v2 1/9] riscv: add Andes SoC family Kconfig support

The first SoC in the Andes series is QiLai. It includes a high-performance
quad-core RISC-V AX45MP cluster and one NX27V vector processor.

For further information, refer to [1].

[1] https://www.andestech.com/en/products-solutions/andeshape-platforms/qilai-chip/

Signed-off-by: Ben Zong-You Xie <ben717@...estech.com>
---
 arch/riscv/Kconfig.socs | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index a9c3d2f6debc..61ceae0aa27a 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -1,5 +1,12 @@
 menu "SoC selection"
 
+config ARCH_ANDES
+	bool "Andes SoCs"
+	depends on MMU && !XIP_KERNEL
+	select ERRATA_ANDES
+	help
+	  This enables support for Andes SoC platform hardware.
+
 config ARCH_MICROCHIP_POLARFIRE
 	def_bool ARCH_MICROCHIP
 
-- 
2.34.1