linux-kernel - Re: [PATCH v4 2/6] phy: exynos5-usbdrd: support HS phy for ExynosAutov920

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Message-ID: <40c06385-26bc-4d5f-8fdc-fee2600afdeb@kernel.org>
Date: Sat, 12 Jul 2025 10:16:11 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Pritam Manohar Sutar <pritam.sutar@...sung.com>, vkoul@...nel.org,
 kishon@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
 alim.akhtar@...sung.com, andre.draszik@...aro.org, peter.griffin@...aro.org,
 neil.armstrong@...aro.org, kauschluss@...root.org,
 ivo.ivanov.ivanov1@...il.com, m.szyprowski@...sung.com,
 s.nawrocki@...sung.com
Cc: linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-samsung-soc@...r.kernel.org, rosa.pila@...sung.com,
 dev.tailor@...sung.com, faraz.ata@...sung.com, muhammed.ali@...sung.com,
 selvarasu.g@...sung.com
Subject: Re: [PATCH v4 2/6] phy: exynos5-usbdrd: support HS phy for
 ExynosAutov920

On 01/07/2025 14:07, Pritam Manohar Sutar wrote:
> This SoC has a single USB 3.1 DRD combo phy that supports both
> UTMI+ (HS) and PIPE3 (SS) and three USB2.0 DRD HS phy controllers
> those only support the UTMI+ (HS) interface.
> 
> Support only UTMI+ port for this SoC which is very similar to what
> the existing Exynos850 supports.
> 
> This SoC shares phy isol between USBs. Bypass PHY isol when first USB
> is powered on and enable it when all of then are powered off. Add
> required change in phy driver to support HS phy for this SoC.
> 
> Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>

Drop

You again added significant changes and claimed they were reviewed.

> Signed-off-by: Pritam Manohar Sutar <pritam.sutar@...sung.com>
> ---
>  drivers/phy/samsung/phy-exynos5-usbdrd.c    | 131 ++++++++++++++++++++
>  include/linux/soc/samsung/exynos-regs-pmu.h |   2 +
>  2 files changed, 133 insertions(+)
> 
> diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/samsung/phy-exynos5-usbdrd.c
> index dd660ebe8045..64f3316f6ad4 100644
> --- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
> +++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
> @@ -480,6 +480,8 @@ struct exynos5_usbdrd_phy {
>  	enum typec_orientation orientation;
>  };
>  
> +static atomic_t usage_count = ATOMIC_INIT(0);

No, you cannot have singletons. How are you going to handle two
independent phys?

Best regards,
Krzysztof