linux-kernel - Re: [PATCH net-next v08 1/8] hinic3: Async Event Queue interfaces

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20250711174323.5f756f47@kernel.org>
Date: Fri, 11 Jul 2025 17:43:23 -0700
From: Jakub Kicinski <kuba@...nel.org>
To: Fan Gong <gongfan1@...wei.com>
Cc: Zhu Yikai <zhuyikai1@...artners.com>, <netdev@...r.kernel.org>,
 <linux-kernel@...r.kernel.org>, "David S. Miller" <davem@...emloft.net>,
 Eric Dumazet <edumazet@...gle.com>, Paolo Abeni <pabeni@...hat.com>, Simon
 Horman <horms@...nel.org>, Andrew Lunn <andrew+netdev@...n.ch>,
 <linux-doc@...r.kernel.org>, Jonathan Corbet <corbet@....net>, Bjorn
 Helgaas <helgaas@...nel.org>, luosifu <luosifu@...wei.com>, Xin Guo
 <guoxin09@...wei.com>, Shen Chenyang <shenchenyang1@...ilicon.com>, Zhou
 Shuai <zhoushuai28@...wei.com>, Wu Like <wulike1@...wei.com>, Shi Jing
 <shijing34@...wei.com>, Fu Guiming <fuguiming@...artners.com>, Meny Yossefi
 <meny.yossefi@...wei.com>, Gur Stavi <gur.stavi@...wei.com>, Lee Trager
 <lee@...ger.us>, Michael Ellerman <mpe@...erman.id.au>, Vadim Fedorenko
 <vadim.fedorenko@...ux.dev>, Suman Ghosh <sumang@...vell.com>, Przemek
 Kitszel <przemyslaw.kitszel@...el.com>, Joe Damato <jdamato@...tly.com>,
 Christophe JAILLET <christophe.jaillet@...adoo.fr>
Subject: Re: [PATCH net-next v08 1/8] hinic3: Async Event Queue interfaces

On Thu, 10 Jul 2025 14:08:17 +0800 Fan Gong wrote:
> +u32 hinic3_hwif_read_reg(struct hinic3_hwif *hwif, u32 reg)
> +{
> +	void __iomem *addr = hinic3_reg_addr(hwif, reg);
> +	__be32 raw_val;
> +
> +	raw_val = (__force __be32)readl(addr);
> +
> +	return be32_to_cpu(raw_val);
> +}
> +
> +void hinic3_hwif_write_reg(struct hinic3_hwif *hwif, u32 reg, u32 val)
> +{
> +	void __iomem *addr = hinic3_reg_addr(hwif, reg);
> +	__be32 raw_val = cpu_to_be32(val);
> +
> +	writel((__force u32)raw_val, addr);

You should probably use iowrite32be and ioread32be here

> +	queue_work_on(WORK_CPU_UNBOUND, aeqs->workq, &eq->aeq_work);

What's the point of calling queue_work_on() if you're passing UNBOUND

> +	wmb();    /* Write the init values */

barriers are not a flush, you need to say what writes this is
_separating_

> +	err = request_irq(eq->irq_id, aeq_interrupt, 0,
> +			  eq->irq_name, eq);
> +
> +	return err;

you can return request_irq()s retval directly

> +	synchronize_irq(eq->irq_id);
> +	free_irq(eq->irq_id, eq);

no need to sync irq before free
-- 
pw-bot: cr