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Message-Id: <175250413862.1548947.3288364780792858607.b4-ty@kernel.org>
Date: Mon, 14 Jul 2025 16:10:11 +0100
From: Will Deacon <will@...nel.org>
To: mark.rutland@....com,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Yicong Yang <yangyicong@...wei.com>
Cc: catalin.marinas@....com,
	kernel-team@...roid.com,
	Will Deacon <will@...nel.org>,
	hejunhao3@...wei.com,
	jonathan.cameron@...wei.com,
	prime.zeng@...ilicon.com,
	linuxarm@...wei.com,
	yangyicong@...ilicon.com,
	wangyushan12@...wei.com
Subject: Re: [RESEND PATCH v3 0/8] General updates and two new drivers for HiSilicon Uncore PMU

On Thu, 19 Jun 2025 20:55:49 +0800, Yicong Yang wrote:
> Support new version of DDRC/SLLC PMU identified with updated ACPI HID and
> register definition. In order to support this, we do a preliminary refactor
> to initialize device of each version by using driver data of each HID
> rather than checking the version. This will also make the driver easier to
> maintain and extend, since only the HID specific information along
> with the new HID will be added to support the new version without touching
> the common logic.
> 
> [...]

Applied first six patches to will (for-next/perf), thanks!

[1/8] drivers/perf: hisi: Simplify the probe process for each DDRC version
      https://git.kernel.org/will/c/dc86791ff68c
[2/8] drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver
      https://git.kernel.org/will/c/17aa34e86936
[3/8] drivers/perf: hisi: Use ACPI driver_data to retrieve SLLC PMU information
      https://git.kernel.org/will/c/29614c55fe6f
[4/8] drivers/perf: hisi: Add support for HiSilicon SLLC v3 PMU driver
      https://git.kernel.org/will/c/1fd20ba0a1dc
[5/8] drivers/perf: hisi: Relax the event number check of v2 PMUs
      https://git.kernel.org/will/c/35f5b36e8cc2
[6/8] drivers/perf: hisi: Support PMUs with no interrupt
      https://git.kernel.org/will/c/e480898e767c

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev

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