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Message-ID: <aHUeQ8at8UnNtE4m@willie-the-truck>
Date: Mon, 14 Jul 2025 16:12:03 +0100
From: Will Deacon <will@...nel.org>
To: Nick Chan <towinchenmi@...il.com>
Cc: Mark Rutland <mark.rutland@....com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Janne Grunau <j@...nau.net>,
Alyssa Rosenzweig <alyssa@...enzweig.io>,
Neal Gompa <neal@...pa.dev>, Sven Peter <sven@...nel.org>,
Marc Zyngier <maz@...nel.org>, linux-arm-kernel@...ts.infradead.org,
linux-perf-users@...r.kernel.org, devicetree@...r.kernel.org,
asahi@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND v7 05/21] drivers/perf: apple_m1: Support
configuring counters for 32-bit EL0
On Mon, Jun 16, 2025 at 09:31:54AM +0800, Nick Chan wrote:
> Add support for configuring counters for 32-bit EL0 to allow adding support
> for implementations with 32-bit EL0.
>
> For documentation purposes, also add the bitmask for configuring counters
> for 64-bit EL3.
>
> Signed-off-by: Nick Chan <towinchenmi@...il.com>
> ---
> arch/arm64/include/asm/apple_m1_pmu.h | 3 +++
> drivers/perf/apple_m1_cpu_pmu.c | 6 ++++++
> 2 files changed, 9 insertions(+)
>
> diff --git a/arch/arm64/include/asm/apple_m1_pmu.h b/arch/arm64/include/asm/apple_m1_pmu.h
> index 02e05d05851f739b985bf416f1aa3baeafd691dc..6e238043e0dc2360c4fd507dc6a0eb7e055d2d6f 100644
> --- a/arch/arm64/include/asm/apple_m1_pmu.h
> +++ b/arch/arm64/include/asm/apple_m1_pmu.h
> @@ -38,8 +38,11 @@
>
> #define SYS_IMP_APL_PMCR1_EL1 sys_reg(3, 1, 15, 1, 0)
> #define SYS_IMP_APL_PMCR1_EL12 sys_reg(3, 1, 15, 7, 2)
> +#define PMCR1_COUNT_A32_EL0_0_7 GENMASK(7, 0)
> #define PMCR1_COUNT_A64_EL0_0_7 GENMASK(15, 8)
> #define PMCR1_COUNT_A64_EL1_0_7 GENMASK(23, 16)
> +#define PMCR1_COUNT_A64_EL3_0_7 GENMASK(31, 24)
No need to add this one ^^
Will
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