linux-kernel - [PATCH v2 0/5] Expose REFCLK for RMII and enable RMII

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Message-ID: <cover.1752510727.git.Ryan.Wanner@microchip.com>
Date: Mon, 14 Jul 2025 09:36:58 -0700
From: <Ryan.Wanner@...rochip.com>
To: <andrew+netdev@...n.ch>, <davem@...emloft.net>, <edumazet@...gle.com>,
	<kuba@...nel.org>, <pabeni@...hat.com>, <robh@...nel.org>,
	<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <nicolas.ferre@...rochip.com>,
	<alexandre.belloni@...tlin.com>, <claudiu.beznea@...on.dev>
CC: <netdev@...r.kernel.org>, <devicetree@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>, "Ryan
 Wanner" <Ryan.Wanner@...rochip.com>
Subject: [PATCH v2 0/5] Expose REFCLK for RMII and enable RMII

From: Ryan Wanner <Ryan.Wanner@...rochip.com>

This set allows the REFCLK property to be exposed as a dt-property to
properly reflect the correct RMII layout. RMII can take an external or
internal provided REFCLK, since this is not SoC dependent but board
dependent this must be exposed as a DT property for the macb driver.

This set also enables RMII mode for the SAMA7 SoCs gigabit mac.

V1 is here [1]

changes v1 -> v2:
- Add device tree changes to use the new REFCLK property.
- Remove USARIO_HAS_CLKEN from the sama7g54 emac node to use the exposed
  REFCLK propterty.
- Use property_read_bool() instead of property_present check.
- Adjust variables to follow reverse xmas tree

1) https://lore.kernel.org/all/cover.1750346271.git.Ryan.Wanner@microchip.com/

Ryan Wanner (5):
  dt-bindings: net: cdns,macb: Add external REFCLK property
  net: cadence: macb: Expose REFCLK as a device tree property
  net: cadence: macb: Enable RMII for SAMA7 gem
  net: cadence: macb: sama7g5_emac: Remove USARIO CLKEN flag
  ARM: dts: microchip: sama7g5: Add RMII ext refclk flag

 Documentation/devicetree/bindings/net/cdns,macb.yaml |  7 +++++++
 arch/arm/boot/dts/microchip/at91-sama7g5ek.dts       |  1 +
 drivers/net/ethernet/cadence/macb_main.c             | 11 +++++++++--
 3 files changed, 17 insertions(+), 2 deletions(-)

-- 
2.43.0