lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <56192a5d-406a-494a-9f32-409e2c1d69bc@kernel.org>
Date: Tue, 15 Jul 2025 17:47:04 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: dongxuyang@...incomputing.com, p.zabel@...gutronix.de, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Cc: ningyu@...incomputing.com, linmin@...incomputing.com,
 huangyifeng@...incomputing.com, pinkesh.vaghela@...fochips.com
Subject: Re: [PATCH v4 0/2] Add driver support for ESWIN eic7700 SoC reset
 controller

On 15/07/2025 14:14, dongxuyang@...incomputing.com wrote:
> From: Xuyang Dong <dongxuyang@...incomputing.com>
> 
> Updates:
> 
>   dt-bindings: reset: eswin: Documentation for eic7700 SoC
>   v3 -> v4:
>     1. Remove register offsets in dt-bindings.
>     2. Changed the const value of "#reset-cells" from 2 to 1.
>        Because the offsets were removed from dt-bindings. There are
>        only IDs. And removed the description of it.
>     3. Modify copyright year from 2024 to 2025.
>     4. Redefined the IDs in the dt-bindings and used these to build a
>        reset array in reset driver. Ensure that the reset register and
>        reset value corresponding to the IDs are correct.
>     Link to v3: https://lore.kernel.org/all/20250624103212.287-1-dongxuyang@eswincomputing.com/

This leads to clock patchset, not reset.

Best regards,
Krzysztof

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ