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Message-ID: <e4b01f45-c282-4cc9-8b31-0869bdd1aae1@lunn.ch>
Date: Tue, 15 Jul 2025 18:11:01 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Luo Jie <quic_luoj@...cinc.com>
Cc: Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
netdev@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next v3 1/3] net: phy: qcom: Add PHY counter support
> +int qcom_phy_update_stats(struct phy_device *phydev,
> + struct qcom_phy_hw_stats *hw_stats)
> +{
> + int ret;
> + u32 cnt;
> +
> + /* PHY 32-bit counter for RX packets. */
> + ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_PKT_15_0);
> + if (ret < 0)
> + return ret;
> +
> + cnt = ret;
> +
> + ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_PKT_31_16);
> + if (ret < 0)
> + return ret;
Does reading QCA808X_MMD7_CNT_RX_PKT_15_0 cause
QCA808X_MMD7_CNT_RX_PKT_31_16 to latch?
Sometimes you need to read the high part, the low part, and then
reread the high part to ensure it has not incremented. But this is
only needed if the hardware does not latch.
Andrew
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