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Message-ID: <CAL_JsqLKLKHj+vQJmZnaXRj3TmqR3ELjpBc27HRbTOOP9FD0hg@mail.gmail.com>
Date: Tue, 15 Jul 2025 12:43:35 -0500
From: Rob Herring <robh@...nel.org>
To: Inochi Amaoto <inochiama@...il.com>
Cc: Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>, 
	Chen Wang <unicorn_wang@...look.com>, Richard Cochran <richardcochran@...il.com>, 
	Alexander Sverdlin <alexander.sverdlin@...il.com>, Yixun Lan <dlan@...too.org>, 
	Ze Huang <huangze@...t.edu.cn>, Thomas Bonnefille <thomas.bonnefille@...tlin.com>, 
	devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org, 
	sophgo@...ts.linux.dev, linux-kernel@...r.kernel.org, netdev@...r.kernel.org, 
	Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH 2/3] riscv: dts: sophgo: Add mdio multiplexer device for cv18xx

On Wed, Jul 2, 2025 at 9:16 PM Inochi Amaoto <inochiama@...il.com> wrote:
>
> Add DT device node of mdio multiplexer device for cv18xx SoC.

This adds a dtbs_check warning:

mdio@...9800 (mdio-mux-mmioreg): mdio@80:reg:0:0: 128 is greater than
the maximum of 31

>
> Signed-off-by: Inochi Amaoto <inochiama@...il.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv180x.dtsi | 29 ++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv180x.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
> index 7eecc67f896e..3a82cc40ea1a 100644
> --- a/arch/riscv/boot/dts/sophgo/cv180x.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
> @@ -31,6 +31,33 @@ rst: reset-controller@...3000 {
>                         #reset-cells = <1>;
>                 };
>
> +               mdio: mdio@...9800 {

The nodename is wrong here because this is not an MDIO bus. It is a
mux. So "mdio-mux@..." for the node name.

> +                       compatible = "mdio-mux-mmioreg", "mdio-mux";
> +                       reg = <0x3009800 0x4>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       mdio-parent-bus = <&gmac0_mdio>;
> +                       mux-mask = <0x80>;
> +                       status = "disabled";
> +
> +                       internal_mdio: mdio@0 {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               reg = <0>;
> +
> +                               internal_ephy: phy@0 {
> +                                       compatible = "ethernet-phy-ieee802.3-c22";
> +                                       reg = <1>;
> +                               };
> +                       };
> +
> +                       external_mdio: mdio@80 {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               reg = <0x80>;
> +                       };
> +               };
> +
>                 gpio0: gpio@...0000 {
>                         compatible = "snps,dw-apb-gpio";
>                         reg = <0x3020000 0x1000>;
> @@ -196,6 +223,8 @@ gmac0: ethernet@...0000 {
>                         clock-names = "stmmaceth", "ptp_ref";
>                         interrupts = <SOC_PERIPHERAL_IRQ(15) IRQ_TYPE_LEVEL_HIGH>;
>                         interrupt-names = "macirq";
> +                       phy-handle = <&internal_ephy>;
> +                       phy-mode = "internal";
>                         resets = <&rst RST_ETH0>;
>                         reset-names = "stmmaceth";
>                         rx-fifo-depth = <8192>;
> --
> 2.50.0
>

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