linux-kernel - Re: [RESEND PATCH v3 7/8] drivers/perf: hisi: Add support for HiSilicon NoC PMU

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Message-ID: <501e61fb-2dc5-c207-4bfd-1d3f23cd2c28@huawei.com>
Date: Tue, 15 Jul 2025 16:09:34 +0800
From: Yicong Yang <yangyicong@...wei.com>
To: Will Deacon <will@...nel.org>
CC: <yangyicong@...ilicon.com>, <mark.rutland@....com>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
	<hejunhao3@...wei.com>, <jonathan.cameron@...wei.com>,
	<prime.zeng@...ilicon.com>, <linuxarm@...wei.com>, <wangyushan12@...wei.com>
Subject: Re: [RESEND PATCH v3 7/8] drivers/perf: hisi: Add support for
 HiSilicon NoC PMU

On 2025/7/14 23:11, Will Deacon wrote:
> On Thu, Jun 19, 2025 at 08:55:56PM +0800, Yicong Yang wrote:
>> From: Yicong Yang <yangyicong@...ilicon.com>
>>
>> Adds the support for HiSilicon NoC (Network on Chip) PMU which
>> will be used to monitor the events on the system bus. The PMU
>> device will be named after the SCL ID (either Super CPU cluster
>> or Super IO cluster) and the index ID, just similar to other
>> HiSilicon Uncore PMUs. Below PMU formats are provided besides
>> the event:
>>
>> - ch: the transaction channel (data, request, response, etc) which
>>   can be used to filter the counting.
>> - tt_en: tracetag filtering enable. Just as other HiSilicon Uncore
>>   PMUs the NoC PMU supports only counting the transactions with
>>   tracetag.
>>
>> The NoC PMU doesn't have an interrupt to indicate the overflow.
>> However we have a 64 bit counter which is large enough and it's
>> nearly impossible to overflow.
>>
>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
>> Signed-off-by: Yicong Yang <yangyicong@...ilicon.com>
>> ---
>>  Documentation/admin-guide/perf/hisi-pmu.rst  |  11 +
>>  drivers/perf/hisilicon/Makefile              |   3 +-
>>  drivers/perf/hisilicon/hisi_uncore_noc_pmu.c | 392 +++++++++++++++++++
>>  3 files changed, 405 insertions(+), 1 deletion(-)
>>  create mode 100644 drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
> 
> [...]
> 
>> +static int hisi_noc_pmu_dev_init(struct platform_device *pdev, struct hisi_pmu *noc_pmu)
>> +{
>> +	hisi_uncore_pmu_init_topology(noc_pmu, &pdev->dev);
>> +
>> +	if (noc_pmu->topo.scl_id < 0)
>> +		return dev_err_probe(&pdev->dev, -EINVAL, "failed to get scl-id\n");
>> +
>> +	if (noc_pmu->topo.index_id < 0)
>> +		return dev_err_probe(&pdev->dev, -EINVAL, "failed to get idx-id\n");
>> +
>> +	if (noc_pmu->topo.sub_id < 0)
>> +		return dev_err_probe(&pdev->dev, -EINVAL, "failed to get sub-id\n");
>> +
>> +	noc_pmu->base = devm_platform_ioremap_resource(pdev, 0);
>> +	if (IS_ERR(noc_pmu->base))
>> +		return dev_err_probe(&pdev->dev, PTR_ERR(noc_pmu->base),
>> +				     "fail to remap io memory\n");
>> +
>> +	noc_pmu->on_cpu = -1;
>> +	noc_pmu->dev = &pdev->dev;
>> +	noc_pmu->ops = &hisi_uncore_noc_ops;
>> +	noc_pmu->pmu_events.attr_groups = hisi_noc_pmu_attr_groups;
>> +	noc_pmu->num_counters = NOC_PMU_NR_COUNTERS;
>> +	noc_pmu->counter_bits = NOC_PMU_COUNTER_BITS;
>> +	noc_pmu->check_event = NOC_PMU_EVENT_CTRL_TYPE;
>> +	noc_pmu->identifier = readl(noc_pmu->base + NOC_PMU_VERSION);
> 
> Would it be worth going straight to an ACPI-based lookup for this lot?
> The earlier patches in the series rework the existing drivers to go in
> that direction as it's easier to extend, so it seems a little odd for
> new driver code to revert back to e.g. reeading the version number.
> 
> Same for the misc node driver in the next patch.
> 

ok. was planned to change to that when new version comes with new capabilities and
hardware interface, but it's easy to change to that. will update.

Thanks.