linux-kernel - Re: [RFC PATCH v8 20/35] x86/apic: Populate .read()/.write() callbacks of Secure AVIC driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAMvTesB0bzdgEsqkKVxZW8LvzQg==Wjtq8Y08PmHjf_A23YwtQ@mail.gmail.com>
Date: Tue, 15 Jul 2025 16:15:40 +0800
From: Tianyu Lan <ltykernel@...il.com>
To: Neeraj Upadhyay <Neeraj.Upadhyay@....com>
Cc: linux-kernel@...r.kernel.org, bp@...en8.de, tglx@...utronix.de, 
	mingo@...hat.com, dave.hansen@...ux.intel.com, Thomas.Lendacky@....com, 
	nikunj@....com, Santosh.Shukla@....com, Vasant.Hegde@....com, 
	Suravee.Suthikulpanit@....com, David.Kaplan@....com, x86@...nel.org, 
	hpa@...or.com, peterz@...radead.org, seanjc@...gle.com, pbonzini@...hat.com, 
	kvm@...r.kernel.org, kirill.shutemov@...ux.intel.com, huibo.wang@....com, 
	naveen.rao@....com, kai.huang@...el.com
Subject: Re: [RFC PATCH v8 20/35] x86/apic: Populate .read()/.write()
 callbacks of Secure AVIC driver

On Wed, Jul 9, 2025 at 11:40 AM Neeraj Upadhyay <Neeraj.Upadhyay@....com> wrote:
>
> Add read() and write() APIC callback functions to read and write x2APIC
> registers directly from the guest APIC backing page of a vCPU.
>
> The x2APIC registers are mapped at an offset within the guest APIC
> backing page which is same as their x2APIC MMIO offset. Secure AVIC
> adds new registers such as ALLOWED_IRRs (which are at 4-byte offset
> within the IRR register offset range) and NMI_REQ to the APIC register
> space.
>
> When Secure AVIC is enabled, guest's rdmsr/wrmsr of APIC registers
> result in VC exception (for non-accelerated register accesses) with
> error code VMEXIT_AVIC_NOACCEL. The VC exception handler can read/write
> the x2APIC register in the guest APIC backing page to complete the
> rdmsr/wrmsr. Since doing this would increase the latency of accessing
> x2APIC registers, instead of doing rdmsr/wrmsr based reg accesses
> and handling reads/writes in VC exception, directly read/write APIC
> registers from/to the guest APIC backing page of the vCPU in read()
> and write() callbacks of the Secure AVIC APIC driver.
>
> Co-developed-by: Kishon Vijay Abraham I <kvijayab@....com>
> Signed-off-by: Kishon Vijay Abraham I <kvijayab@....com>
> Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@....com>
> ---
> Changes since v7:
>  - No change.

Reviewed-by: Tianyu Lan <tiala@...rosoft.com>