linux-kernel - [kvm-unit-tests patch 0/5] Fix pmu test errors on SRF/CWF

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Message-ID: <20250712174915.196103-1-dapeng1.mi@linux.intel.com>
Date: Sat, 12 Jul 2025 17:49:10 +0000
From: Dapeng Mi <dapeng1.mi@...ux.intel.com>
To: Sean Christopherson <seanjc@...gle.com>,
	Paolo Bonzini <pbonzini@...hat.com>
Cc: kvm@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Jim Mattson <jmattson@...gle.com>,
	Mingwei Zhang <mizhang@...gle.com>,
	Zide Chen <zide.chen@...el.com>,
	Das Sandipan <Sandipan.Das@....com>,
	Shukla Manali <Manali.Shukla@....com>,
	Yi Lai <yi1.lai@...el.com>,
	Dapeng Mi <dapeng1.mi@...el.com>,
	Dapeng Mi <dapeng1.mi@...ux.intel.com>
Subject: [kvm-unit-tests patch 0/5] Fix pmu test errors on SRF/CWF

This patchset fixes the pmu test errors on Atom server like Sierra
Forest (SRF) and Clearwater Forest (CWF).

On Intel Atom platforms, the PMU events "Instruction Retired" or
"Branch Instruction Retired" may be overcounted for some certain
instructions, like FAR CALL/JMP, RETF, IRET, VMENTRY/VMEXIT/VMPTRLD
and complex SGX/SMX/CSTATE instructions/flows[1].

In details, for the Atom platforms before Sierra Forest (including
Sierra Forest), Both 2 events "Instruction Retired" and
"Branch Instruction Retired" would be overcounted on these certain
instructions, but for Clearwater Forest only "Instruction Retired" event
is overcounted on these instructions.

As the overcount issue, pmu test would fail to validate the precise
count for these 2 events on SRF and CWF. Patches 1-3/5 detects if the
platform has this overcount issue, if so relax the precise count
validation for these 2 events.

Besides it looks more LLC references are needed on SRF/CWF, so adjust
the "LLC references" event count range.

Tests:
  * pmu test passes on Intel GNR/SRF/CWF platforms.

Ref:
  [1]https://edc.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/sierra-forest/xeon-6700-series-processor-with-e-cores-specification-update/errata-details

dongsheng (5):
  x86/pmu: Add helper to detect Intel overcount issues
  x86/pmu: Relax precise count validation for Intel overcounted
    platforms
  x86/pmu: Fix incorrect masking of fixed counters
  x86/pmu: Handle instruction overcount issue in overflow test
  x86/pmu: Expand "llc references" upper limit for broader compatibility

 lib/x86/processor.h | 17 +++++++++
 x86/pmu.c           | 93 +++++++++++++++++++++++++++++++++++++++------
 2 files changed, 98 insertions(+), 12 deletions(-)

base-commit: 525bdb5d65d51a367341f471eb1bcd505d73c51f
-- 
2.43.0