lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAAT7Ki_sa4OPkC9EPWaeDW1LryR0wfk363dDM6uexOJSbTNsLw@mail.gmail.com>
Date: Tue, 15 Jul 2025 21:13:41 +0800
From: Han Gao <rabenda.cn@...il.com>
To: guoren@...nel.org
Cc: palmer@...belt.com, conor@...nel.org, alexghiti@...osinc.com, 
	paul.walmsley@...ive.com, bjorn@...osinc.com, eobras@...hat.com, 
	corbet@....net, peterlin@...estech.com, linux-riscv@...ts.infradead.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2 1/2] riscv: Move vendor errata definitions to new header

On Sun, Jul 13, 2025 at 11:53 PM <guoren@...nel.org> wrote:
>
> From: "Guo Ren (Alibaba DAMO Academy)" <guoren@...nel.org>
>
> Move vendor errata definitions into errata_list_vendors.h.
>
> Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@...nel.org>
> ---
>  arch/riscv/include/asm/errata_list.h         | 19 +---------------
>  arch/riscv/include/asm/errata_list_vendors.h | 24 ++++++++++++++++++++
>  2 files changed, 25 insertions(+), 18 deletions(-)
>  create mode 100644 arch/riscv/include/asm/errata_list_vendors.h
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index 6e426ed7919a..18c9f7ee9b7c 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -10,24 +10,7 @@
>  #include <asm/insn-def.h>
>  #include <asm/hwcap.h>
>  #include <asm/vendorid_list.h>
> -
> -#ifdef CONFIG_ERRATA_ANDES
> -#define ERRATA_ANDES_NO_IOCP 0
> -#define ERRATA_ANDES_NUMBER 1
> -#endif
> -
> -#ifdef CONFIG_ERRATA_SIFIVE
> -#define        ERRATA_SIFIVE_CIP_453 0
> -#define        ERRATA_SIFIVE_CIP_1200 1
> -#define        ERRATA_SIFIVE_NUMBER 2
> -#endif
> -
> -#ifdef CONFIG_ERRATA_THEAD
> -#define        ERRATA_THEAD_MAE 0
> -#define        ERRATA_THEAD_PMU 1
> -#define        ERRATA_THEAD_GHOSTWRITE 2
> -#define        ERRATA_THEAD_NUMBER 3
> -#endif
> +#include <asm/errata_list_vendors.h>
>
>  #ifdef __ASSEMBLY__
>
> diff --git a/arch/riscv/include/asm/errata_list_vendors.h b/arch/riscv/include/asm/errata_list_vendors.h
> new file mode 100644
> index 000000000000..a37d1558f39f
> --- /dev/null
> +++ b/arch/riscv/include/asm/errata_list_vendors.h
> @@ -0,0 +1,24 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#ifndef ASM_ERRATA_LIST_VENDORS_H
> +#define ASM_ERRATA_LIST_VENDORS_H
> +
> +#ifdef CONFIG_ERRATA_ANDES
> +#define ERRATA_ANDES_NO_IOCP 0
> +#define ERRATA_ANDES_NUMBER 1
> +#endif
> +
> +#ifdef CONFIG_ERRATA_SIFIVE
> +#define        ERRATA_SIFIVE_CIP_453 0
> +#define        ERRATA_SIFIVE_CIP_1200 1
> +#define        ERRATA_SIFIVE_NUMBER 2
> +#endif
> +
> +#ifdef CONFIG_ERRATA_THEAD
> +#define        ERRATA_THEAD_MAE 0
> +#define        ERRATA_THEAD_PMU 1
> +#define        ERRATA_THEAD_GHOSTWRITE 2
> +#define        ERRATA_THEAD_NUMBER 3
> +#endif
> +
> +#endif
> --
> 2.40.1
>

Tested-by: Han Gao <rabenda.cn@...il.com>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ