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Message-ID: <20250716211938.GA7142@linuxonhyperv3.guj3yctzbm1etfxqx2vob5hsef.xx.internal.cloudapp.net>
Date: Wed, 16 Jul 2025 14:19:38 -0700
From: Hamza Mahfooz <hamzamahfooz@...ux.microsoft.com>
To: Dave Hansen <dave.hansen@...el.com>
Cc: linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...or.com>, Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
David Woodhouse <dwmw@...zon.co.uk>,
Guenter Roeck <linux@...ck-us.net>,
Jared White <jaredwhite@...rosoft.com>
Subject: Re: [PATCH 1/2] x86/build: only align ENTRY_TEXT to PMD_SIZE if
necessary
On Thu, Jul 10, 2025 at 06:14:20AM -0700, Dave Hansen wrote:
> On 7/9/25 13:16, Hamza Mahfooz wrote:
> > PTI requires the begin and end of ENTRY_TEXT be aligned to PMD_SIZE.
> > SRSO requires srso_alias_untrain_ret to be 2M aligned. This costs
> > between 2-4 MiB of RAM (depending on the size of the preceding section).
> > So, only align when PTI is enabled or SRSO is enabled.
>
> This seems so utterly random.
>
> I don't think I was even aware of the SRSO restriction here. Looking
> over it now, I do see the vmlinux.lds.S changes and this does make sense.
>
> But I'm really worried that we've grown more dependencies on this
> alignment. Let's say, for instance, that you forgot to address SRSO in
> this patch and the mitigation got broken. Would we have ever known?
>
> I'd like to hear a lot more from you about why 2-4 MiB of RAM is
> important and what the environment is where you presumably know that
> there are no Meltdown or SRSO vulnerable CPUs.
We are using it to run a stripped down kernel (see [1]) on top of
HyperV for OpenHCL. It is only intended to run OpenVMM ([2]).
1. https://raw.githubusercontent.com/microsoft/OHCL-Linux-Kernel/refs/heads/product/hcl-main/6.12/Microsoft/hcl-x64.config
2. https://github.com/microsoft/OpenVMM
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