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Message-ID: <CAAhSdy2XEyphi5K1xk29JXY991aie0LA5YF2zRbgA_8imSjXQQ@mail.gmail.com>
Date: Wed, 16 Jul 2025 10:50:05 +0530
From: Anup Patel <anup@...infault.org>
To: Xu Lu <luxu.kernel@...edance.com>
Cc: rkrcmar@...tanamicro.com, cleger@...osinc.com, atish.patra@...ux.dev,
paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu,
alex@...ti.fr, kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] RISC-V: KVM: Delegate illegal instruction fault to VS mode
On Mon, Jul 14, 2025 at 3:16 PM Xu Lu <luxu.kernel@...edance.com> wrote:
>
> Delegate illegal instruction fault to VS mode by default to avoid such
> exceptions being trapped to HS and redirected back to VS.
>
> The delegation of illegal instruction fault is particularly important
> to guest applications that use vector instructions frequently. In such
> cases, an illegal instruction fault will be raised when guest user thread
> uses vector instruction the first time and then guest kernel will enable
> user thread to execute following vector instructions.
>
> The fw pmu event counter remains undeleted so that guest can still query
> illegal instruction events via sbi call. Guest will only see zero count
> on illegal instruction faults and know 'firmware' has delegated it.
>
> Signed-off-by: Xu Lu <luxu.kernel@...edance.com>
LGTM.
Reviewed-by: Anup Patel <anup@...infault.org>
Queued this patch for Linux-6.17
Thanks,
Anup
> ---
> arch/riscv/include/asm/kvm_host.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> index 85cfebc32e4cf..3f6b9270f366a 100644
> --- a/arch/riscv/include/asm/kvm_host.h
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -44,6 +44,7 @@
> #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(6)
>
> #define KVM_HEDELEG_DEFAULT (BIT(EXC_INST_MISALIGNED) | \
> + BIT(EXC_INST_ILLEGAL) | \
> BIT(EXC_BREAKPOINT) | \
> BIT(EXC_SYSCALL) | \
> BIT(EXC_INST_PAGE_FAULT) | \
> --
> 2.20.1
>
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