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Message-Id: <20250716061114.2405272-2-shengjiu.wang@nxp.com>
Date: Wed, 16 Jul 2025 14:11:12 +0800
From: Shengjiu Wang <shengjiu.wang@....com>
To: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
shawnguo@...nel.org,
s.hauer@...gutronix.de,
kernel@...gutronix.de,
festevam@...il.com,
devicetree@...r.kernel.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
shengjiu.wang@...il.com
Subject: [PATCH 1/3] arm64: dts: imx8mm-evk: support more sample rates for wm8524 card
The wm8524 codec is connected to the SAI interface. There are two audio
plls on i.MX8MM, one pll can be the clock source of 44kHz series rates,
another pll can be clock source of 48kHz series rates.
Add mclk-fs property for the clock ratio, remove 'clocks' property for
codec that doesn't need to handle clock enablement, add
'system-clock-direction-out' for clock is from cpu dai.
Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
index 622caaa78eaf..ff7ca2075230 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
@@ -147,6 +147,7 @@ sound-wm8524 {
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&cpudai>;
simple-audio-card,bitclock-master = <&cpudai>;
+ simple-audio-card,mclk-fs = <256>;
simple-audio-card,widgets =
"Line", "Left Line Out Jack",
"Line", "Right Line Out Jack";
@@ -158,11 +159,11 @@ cpudai: simple-audio-card,cpu {
sound-dai = <&sai3>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;
+ system-clock-direction-out;
};
simple-audio-card,codec {
sound-dai = <&wm8524>;
- clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
};
};
@@ -570,9 +571,17 @@ &sai2 {
&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>;
- assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
- assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
- assigned-clock-rates = <24576000>;
+ assigned-clocks = <&clk IMX8MM_AUDIO_PLL1>,
+ <&clk IMX8MM_AUDIO_PLL2>,
+ <&clk IMX8MM_CLK_SAI3>;
+ assigned-clock-parents = <0>, <0>, <&clk IMX8MM_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <393216000>, <361267200>, <24576000>;
+ fsl,sai-mclk-direction-output;
+ clocks = <&clk IMX8MM_CLK_SAI3_IPG>, <&clk IMX8MM_CLK_DUMMY>,
+ <&clk IMX8MM_CLK_SAI3_ROOT>, <&clk IMX8MM_CLK_DUMMY>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>,
+ <&clk IMX8MM_AUDIO_PLL2_OUT>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
status = "okay";
};
--
2.34.1
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