linux-kernel - [irqchip: irq/irqchip-next] arm64: smp: Fix pNMI setup after GICv5 rework

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Message-ID: <175264928403.406.14073386220629108833.tip-bot2@tip-bot2>
Date: Wed, 16 Jul 2025 07:01:23 -0000
From: "irqchip-bot for Marc Zyngier" <tip-bot2@...utronix.de>
To: linux-kernel@...r.kernel.org
Cc: Breno Leitao <leitao@...ian.org>,
 Lorenzo Pieralisi <lpieralisi@...nel.org>, Marc Zyngier <maz@...nel.org>,
 tglx@...utronix.de
Subject:
 [irqchip: irq/irqchip-next] arm64: smp: Fix pNMI setup after GICv5 rework

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     65a5520a27570787b17e6f0b093829fc7e0514e2
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/65a5520a27570787b17e6f0b093829fc7e0514e2
Author:        Marc Zyngier <maz@...nel.org>
AuthorDate:    Tue, 15 Jul 2025 18:11:12 +01:00
Committer:     Marc Zyngier <maz@...nel.org>
CommitterDate: Tue, 15 Jul 2025 18:11:12 +01:00

arm64: smp: Fix pNMI setup after GICv5 rework

Breno reports that pNMIs are not behaving the way they should since
they were reworked for GICv5. Turns out we feed the IRQ number to
the pNMI helper instead of the IPI number -- not a good idea.

Fix it by providing the correct number (duh).

Fixes: ba1004f861d16 ("arm64: smp: Support non-SGIs for IPIs")
Reported-by: Breno Leitao <leitao@...ian.org>
Suggested-by: Lorenzo Pieralisi <lpieralisi@...nel.org>
Signed-off-by: Marc Zyngier <maz@...nel.org>
---
 arch/arm64/kernel/smp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 4797e2c..a900835 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -1093,7 +1093,7 @@ static void ipi_setup_sgi(int ipi)
 
 	irq = ipi_irq_base + ipi;
 
-	if (ipi_should_be_nmi(irq)) {
+	if (ipi_should_be_nmi(ipi)) {
 		err = request_percpu_nmi(irq, ipi_handler, "IPI", &irq_stat);
 		WARN(err, "Could not request IRQ %d as NMI, err=%d\n", irq, err);
 	} else {