linux-kernel - Re: [PATCH v3 1/9] drivers/perf: riscv: Add SBI v3.0 flag

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Message-ID: <CAAhSdy1LVhWUovNLwfv2Y2eOzjewM005+gUENFDg-gqUaBuBgg@mail.gmail.com>
Date: Thu, 17 Jul 2025 20:41:21 +0530
From: Anup Patel <anup@...infault.org>
To: Atish Patra <atishp@...osinc.com>
Cc: Will Deacon <will@...nel.org>, Mark Rutland <mark.rutland@....com>, 
	Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Mayuresh Chitale <mchitale@...tanamicro.com>, linux-riscv@...ts.infradead.org, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	Palmer Dabbelt <palmer@...osinc.com>, kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org
Subject: Re: [PATCH v3 1/9] drivers/perf: riscv: Add SBI v3.0 flag

On Fri, May 23, 2025 at 12:33 AM Atish Patra <atishp@...osinc.com> wrote:
>
> There are new PMU related features introduced in SBI v3.0.
> 1. Raw Event v2 which allows mhpmeventX value to be 56 bit wide.
> 2. Get Event info function to do a bulk query at one shot.
>
> Signed-off-by: Atish Patra <atishp@...osinc.com>

LGTM.

Reviewed-by: Anup Patel <anup@...infault.org>

Regards,
Anup

> ---
>  drivers/perf/riscv_pmu_sbi.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index 698de8ddf895..cfd6946fca42 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -63,6 +63,7 @@ PMU_FORMAT_ATTR(event, "config:0-47");
>  PMU_FORMAT_ATTR(firmware, "config:62-63");
>
>  static bool sbi_v2_available;
> +static bool sbi_v3_available;
>  static DEFINE_STATIC_KEY_FALSE(sbi_pmu_snapshot_available);
>  #define sbi_pmu_snapshot_available() \
>         static_branch_unlikely(&sbi_pmu_snapshot_available)
> @@ -1452,6 +1453,9 @@ static int __init pmu_sbi_devinit(void)
>         if (sbi_spec_version >= sbi_mk_version(2, 0))
>                 sbi_v2_available = true;
>
> +       if (sbi_spec_version >= sbi_mk_version(3, 0))
> +               sbi_v3_available = true;
> +
>         ret = cpuhp_setup_state_multi(CPUHP_AP_PERF_RISCV_STARTING,
>                                       "perf/riscv/pmu:starting",
>                                       pmu_sbi_starting_cpu, pmu_sbi_dying_cpu);
>
> --
> 2.43.0
>