lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <1eab01dbf6d2$feed4810$fcc7d830$@samsung.com>
Date: Thu, 17 Jul 2025 09:56:39 +0530
From: "Alim Akhtar" <alim.akhtar@...sung.com>
To: "'Sowon Na'" <sowon.na@...sung.com>, <robh@...nel.org>,
	<krzk@...nel.org>, <conor+dt@...nel.org>, <vkoul@...nel.org>,
	<kishon@...nel.org>
Cc: <krzk+dt@...nel.org>, <linux-kernel@...r.kernel.org>,
	<devicetree@...r.kernel.org>, <linux-samsung-soc@...r.kernel.org>
Subject: RE: [PATCH 4/5] scsi: ufs: exynos: add support for ExynosAutov920
 SoC



> -----Original Message-----
> From: Sowon Na <sowon.na@...sung.com>
> Sent: Wednesday, July 2, 2025 7:03 AM
> To: robh@...nel.org; krzk@...nel.org; conor+dt@...nel.org;
> vkoul@...nel.org; alim.akhtar@...sung.com; kishon@...nel.org
> Cc: krzk+dt@...nel.org; linux-kernel@...r.kernel.org;
> devicetree@...r.kernel.org; linux-samsung-soc@...r.kernel.org;
> sowon.na@...sung.com
> Subject: [PATCH 4/5] scsi: ufs: exynos: add support for ExynosAutov920 SoC
> 
> Add a dedicated compatible and drv_data with associated hooks for
> ExynosAutov920 SoC, Samsung Autotomotive SoC series.
> 
> ExynosAutov920 has the UFSHCI 3.1 compliant UFS controller.
> 
> Signed-off-by: Sowon Na <sowon.na@...sung.com>
> ---
>  drivers/ufs/host/ufs-exynos.c | 130
> +++++++++++++++++++++++++++++++---
>  1 file changed, 120 insertions(+), 10 deletions(-)
> 
[snip]

>  	struct phy *generic_phy = ufs->phy;
>  	int ret = 0;
> 
> -	if (ufs->avail_ln_rx == 0 || ufs->avail_ln_tx == 0) {
> -		ufshcd_dme_get(hba,
> UIC_ARG_MIB(PA_AVAILRXDATALANES),
> -			&ufs->avail_ln_rx);
> -		ufshcd_dme_get(hba,
> UIC_ARG_MIB(PA_AVAILTXDATALANES),
> -			&ufs->avail_ln_tx);
> -		WARN(ufs->avail_ln_rx != ufs->avail_ln_tx,
> -			"available data lane is not equal(rx:%d, tx:%d)\n",
> -			ufs->avail_ln_rx, ufs->avail_ln_tx);
> -	}
> -

Why you are moving these changes from exynos_ufs_phy_init() to exynos_ufs_pre_link()? 
If at all this is needed, this need to be a separate patch, not related to adding exynosautov920 support. 

>  	phy_set_bus_width(generic_phy, ufs->avail_ln_rx);
> 
>  	if (generic_phy->power_count) {
> @@ -1065,6 +1148,16 @@ static int exynos_ufs_pre_link(struct ufs_hba
> *hba)
>  	/* unipro */
>  	exynos_ufs_config_unipro(ufs);
> 
> +	if (ufs->avail_ln_rx == 0 || ufs->avail_ln_tx == 0) {
> +		ufshcd_dme_get(hba,
> UIC_ARG_MIB(PA_AVAILRXDATALANES),
> +			       &ufs->avail_ln_rx);
> +		ufshcd_dme_get(hba,
> UIC_ARG_MIB(PA_AVAILTXDATALANES),
> +			       &ufs->avail_ln_tx);
> +		WARN(ufs->avail_ln_rx != ufs->avail_ln_tx,
> +		     "available data lane is not equal(rx:%d, tx:%d)\n",
> +		     ufs->avail_ln_rx, ufs->avail_ln_tx);
> +	}
> +



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ