linux-kernel - Re: [PATCH v4 6/7] riscv: Add tools support for xmipsexectl

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Message-ID: <1abf91b9-a295-4b0c-b4c8-176f7c59b950@ghiti.fr>
Date: Thu, 17 Jul 2025 11:39:11 +0200
From: Alexandre Ghiti <alex@...ti.fr>
To: aleksa.paunovic@...cgroup.com, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Paul Walmsley <paul.walmsley@...ive.com>,
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
 Jonathan Corbet <corbet@....net>
Cc: Palmer Dabbelt <palmer@...ive.com>, Conor Dooley <conor@...nel.org>,
 devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
 linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org
Subject: Re: [PATCH v4 6/7] riscv: Add tools support for xmipsexectl

On 6/25/25 16:21, Aleksa Paunovic via B4 Relay wrote:
> From: Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
>
> Use the hwprobe syscall to decide which PAUSE instruction to execute in
> userspace code.
>
> Signed-off-by: Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
> ---
>   tools/arch/riscv/include/asm/vdso/processor.h | 27 +++++++++++++++++----------
>   1 file changed, 17 insertions(+), 10 deletions(-)
>
> diff --git a/tools/arch/riscv/include/asm/vdso/processor.h b/tools/arch/riscv/include/asm/vdso/processor.h
> index 662aca03984817f9c69186658b19e9dad9e4771c..027219a486b7b93814888190f8224af29498707c 100644
> --- a/tools/arch/riscv/include/asm/vdso/processor.h
> +++ b/tools/arch/riscv/include/asm/vdso/processor.h
> @@ -4,26 +4,33 @@
>   
>   #ifndef __ASSEMBLY__
>   
> +#include <asm/hwprobe.h>
> +#include <sys/hwprobe.h>
> +#include <asm/vendor/mips.h>
>   #include <asm-generic/barrier.h>
>   
>   static inline void cpu_relax(void)
>   {
> +	struct riscv_hwprobe pair;
> +	bool has_mipspause;
>   #ifdef __riscv_muldiv
>   	int dummy;
>   	/* In lieu of a halt instruction, induce a long-latency stall. */
>   	__asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
>   #endif
>   
> -#ifdef CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE
> -	/*
> -	 * Reduce instruction retirement.
> -	 * This assumes the PC changes.
> -	 */
> -	__asm__ __volatile__ ("pause");
> -#else
> -	/* Encoding of the pause instruction */
> -	__asm__ __volatile__ (".4byte 0x100000F");
> -#endif
> +	pair.key = RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0;
> +	__riscv_hwprobe(&pair, 1, 0, NULL, 0);


So this should not trigger a syscall, so even if it's weird, I guess 
that's ok.

Another solution that was already suggested for CFI would be to 
implement VDSO alternatives, we could easily parse the VDSO elf and 
patch it at boot time, I'm pretty sure that will be useful at some point.


> +	has_mipspause = pair.value & RISCV_HWPROBE_VENDOR_EXT_XMIPSEXECTL;
> +
> +	if (has_mipspause) {
> +		/* Encoding of the mips pause instruction */
> +		__asm__ __volatile__(".4byte 0x00501013");


Here you could have used the MIPS_PAUSE introduced earlier.


> +	} else {
> +		/* Encoding of the pause instruction */
> +		__asm__ __volatile__(".4byte 0x100000F");
> +	}
> +
>   	barrier();
>   }
>   
>

Anyway, let's merge this for now:

Reviewed-by: Alexandre Ghiti <alexghiti@...osinc.com>

Thanks,

Alex