[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <c97f9e7c-4985-4e2f-aaaf-981960974212@collabora.com>
Date: Thu, 17 Jul 2025 12:27:56 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Viresh Kumar <viresh.kumar@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>
Cc: kernel@...labora.com, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v3 4/4] cpufreq: mediatek-hw: Add support for MT8196
Il 16/07/25 19:51, Nicolas Frattaroli ha scritto:
> The MT8196 SoC uses DVFS to set a desired target frequency for each CPU
> core. It also uses slightly different register offsets.
>
> Add support for it, which necessitates reworking how the mmio regs are
> acquired, as mt8196 has the fdvfs register before the performance domain
> registers.
>
> I've verified with both `sysbench cpu run` and `head -c 10G \
> /dev/urandom | pigz -p 8 -c - | pv -ba > /dev/null` that we don't just
> get a higher reported clock frequency, but that the observed performance
> also increases, by a factor of 2.64 in an 8 thread sysbench test.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogiaocchino.delregno@...labora.com>
Powered by blists - more mailing lists