linux-kernel - Re: [PATCH 7/7] clk: qcom: gcc: Add support for Global Clock Controller

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Message-ID: <2f5b5e6e-5041-453e-b3f7-b10b40bc6f57@oss.qualcomm.com>
Date: Fri, 18 Jul 2025 23:07:23 +0530
From: Taniya Das <taniya.das@....qualcomm.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Abel Vesa <abel.vesa@...aro.org>,
        Pankaj Patil <pankaj.patil@....qualcomm.com>
Cc: sboyd@...nel.org, mturquette@...libre.com, andersson@...nel.org,
        robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
        quic_rjendra@...cinc.com, linux-clk@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 7/7] clk: qcom: gcc: Add support for Global Clock
 Controller



On 7/17/2025 3:38 PM, Krzysztof Kozlowski wrote:
> On 17/07/2025 11:57, Abel Vesa wrote:
>> On 25-07-16 20:50:17, Pankaj Patil wrote:
>>> From: Taniya Das <taniya.das@....qualcomm.com>
>>>
>>> Add support for Global clock controller for Glymur platform.
>>>
>>> Signed-off-by: Taniya Das <taniya.das@....qualcomm.com>
>>> Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
>>> ---
>>>  drivers/clk/qcom/Kconfig      |   10 +
>>>  drivers/clk/qcom/Makefile     |    1 +
>>>  drivers/clk/qcom/gcc-glymur.c | 8623 +++++++++++++++++++++++++++++++++
>>>  3 files changed, 8634 insertions(+)
>>>  create mode 100644 drivers/clk/qcom/gcc-glymur.c
>>>
>>> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
>>> index 051301007aa6..1d9e8c6aeaed 100644
>>> --- a/drivers/clk/qcom/Kconfig
>>> +++ b/drivers/clk/qcom/Kconfig
>>> @@ -645,6 +645,16 @@ config SAR_GPUCC_2130P
>>>  	  Say Y if you want to support graphics controller devices and
>>>  	  functionality such as 3D graphics.
>>>  
>>> +config SC_GCC_GLYMUR
>>
>> Wait, are we going back to this now?
>>
>> X Elite had CLK_X1E80100_GCC, so maybe this should be CLK_GLYMUR_GCC
>> then.
> 
> 
> Yeah, the SC is meaningless here, unless you call it CLK_SC8480XP_GCC,
> so the authors need to decide on one naming. Not mixtures..
> 
> 
Glymur follows the "SC" naming convention, and historically we've
adhered to the format: "SC/SM/SDX/SA_<Clock Controller>_<Target Name or
Chipset>". This structure has helped maintain consistency and clarity
across platforms.

The case of X1E80100 appears to be an exception—likely influenced by its
unique naming convention at the time.

That said, I’d prefer to stay aligned with the established convention
used for earlier chipsets to preserve continuity. I’d appreciate hearing
your thoughts on this as well.

-- 
Thanks,
Taniya Das