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Message-ID: <987aeeef-6f3e-4ba3-b04f-a60e0cf201ac@collabora.com>
Date: Fri, 18 Jul 2025 08:44:59 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Cathy Xu <ot_cathy.xu@...iatek.com>,
Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>,
Sean Wang <sean.wang@...nel.org>
Cc: Lei Xue <lei.xue@...iatek.com>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
Yong Mao <yong.mao@...iatek.com>, Wenbin Mei <Wenbin.Mei@...iatek.com>,
Axe Yang <Axe.Yang@...iatek.com>
Subject: Re: [PATCH v2 2/3] arm64: dts: mediatek: mt8189: Add pinmux macro
header file
Il 11/07/25 11:44, Cathy Xu ha scritto:
> Add the pinctrl header file on MediaTek mt8189.
>
> Signed-off-by: Cathy Xu <ot_cathy.xu@...iatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8189-pinfunc.h | 1125 +++++++++++++++++
> 1 file changed, 1125 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8189-pinfunc.h
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8189-pinfunc.h b/arch/arm64/boot/dts/mediatek/mt8189-pinfunc.h
> new file mode 100644
> index 000000000000..f9c270ebab89
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt8189-pinfunc.h
> @@ -0,0 +1,1125 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2025 MediaTek Inc.
> + * Author: Lei Xue <lei.xue@...iatek.com>
> + * Cathy Xu <ot_cathy.xu@...iatek.com>
> + */
> +
> +#ifndef __MT8189_PINFUNC_H
> +#define __MT8189_PINFUNC_H
> +
> +#include "mt65xx.h"
> +
..snip..
> +#define PINMUX_GPIO27__FUNC_GPIO27 (MTK_PIN_NO(27) | 0)
> +#define PINMUX_GPIO27__FUNC_DP_TX_HPD (MTK_PIN_NO(27) | 1)
> +#define PINMUX_GPIO27__FUNC_mbistreaden_trigger (MTK_PIN_NO(27) | 2)
^^^^^^^^^^^^^^^^^^^
Please fix: this has to be uppercase as much as the other definitions.
> +#define PINMUX_GPIO27__FUNC_MD32_0_GPIO0 (MTK_PIN_NO(27) | 3)
> +#define PINMUX_GPIO27__FUNC_TP_UCTS1_VCORE (MTK_PIN_NO(27) | 4)
> +#define PINMUX_GPIO27__FUNC_CMVREF4 (MTK_PIN_NO(27) | 5)
> +#define PINMUX_GPIO27__FUNC_EXTIF0_ACT (MTK_PIN_NO(27) | 6)
> +#define PINMUX_GPIO27__FUNC_ANT_SEL0 (MTK_PIN_NO(27) | 7)
> +
> +#define PINMUX_GPIO28__FUNC_GPIO28 (MTK_PIN_NO(28) | 0)
> +#define PINMUX_GPIO28__FUNC_EDP_TX_HPD (MTK_PIN_NO(28) | 1)
> +#define PINMUX_GPIO28__FUNC_mbistwriteen_trigger (MTK_PIN_NO(28) | 2)
same here
> +#define PINMUX_GPIO28__FUNC_MD32_1_GPIO0 (MTK_PIN_NO(28) | 3)
> +#define PINMUX_GPIO28__FUNC_TP_URTS1_VCORE (MTK_PIN_NO(28) | 4)
> +#define PINMUX_GPIO28__FUNC_EXTIF0_PRI (MTK_PIN_NO(28) | 6)
> +#define PINMUX_GPIO28__FUNC_ANT_SEL1 (MTK_PIN_NO(28) | 7)
> +
Cheers,
Angelo
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