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Message-ID: <5474709.5fSG56mABF@senjougahara>
Date: Fri, 18 Jul 2025 18:11:07 +0900
From: Mikko Perttunen <mperttunen@...dia.com>
To: Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Thierry Reding <thierry.reding@...il.com>,
 Thierry Reding <treding@...dia.com>, Jonathan Hunter <jonathanh@...dia.com>,
 Peter De Schrijver <pdeschrijver@...dia.com>,
 Prashant Gaikwad <pgaikwad@...dia.com>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
 Svyatoslav Ryhel <clamor95@...il.com>, Dmitry Osipenko <digetx@...il.com>,
 Svyatoslav Ryhel <clamor95@...il.com>
Cc: dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
 linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-clk@...r.kernel.org
Subject:
 Re: [PATCH v1 3/5] gpu/drm: host1x: mipi: add Tegra20/Tegra30 MIPI
 calibration logic

On Thursday, July 17, 2025 11:21 PM Svyatoslav Ryhel wrote:
> ...
> @@ -311,6 +330,43 @@ int tegra_mipi_finish_calibration(struct
> tegra_mipi_device *device) }
>  EXPORT_SYMBOL(tegra_mipi_finish_calibration);
> 
> +static int tegra20_mipi_calibration(struct tegra_mipi_device *device)
> +{
> +	struct tegra_mipi *mipi = device->mipi;
> +	const struct tegra_mipi_soc *soc = mipi->soc;
> +	u32 value;
> +	int err;
> +
> +	err = clk_enable(mipi->csi_clk);
> +	if (err < 0)
> +		return err;
> +
> +	mutex_lock(&mipi->lock);
> +
> +	value = MIPI_CAL_CONFIG_TERMOS(soc->termos);
> +	tegra_mipi_writel(mipi, value, CSI_CILA_MIPI_CAL_CONFIG);
> +
> +	value = MIPI_CAL_CONFIG_TERMOS(soc->termos);
> +	tegra_mipi_writel(mipi, value, CSI_CILB_MIPI_CAL_CONFIG);
> +
> +	value = MIPI_CAL_CONFIG_HSPDOS(soc->hspdos) |
> +		MIPI_CAL_CONFIG_HSPUOS(soc->hspuos);
> +	tegra_mipi_writel(mipi, value, CSI_DSI_MIPI_CAL_CONFIG);
> +
> +	value = MIPI_CAL_BIAS_PAD_DRV_DN_REF(soc->pad_drive_down_ref) |
> +		MIPI_CAL_BIAS_PAD_DRV_UP_REF(soc->pad_drive_up_ref);
> +	tegra_mipi_writel(mipi, value, CSI_MIPIBIAS_PAD_CONFIG);
> +
> +	tegra_mipi_writel(mipi, 0x0, CSI_CIL_PAD_CONFIG);
> +
> +	mutex_unlock(&mipi->lock);
> +
> +	clk_disable(mipi->csi_clk);
> +	clk_disable(mipi->clk);
> +
> +	return 0;
> +}
> +

Where does this sequence come from? It looks a bit strange to me, since it 
doesn't trigger calibration at all. It would be useful to mention the source 
in the commit message.

Mikko




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