linux-kernel - Re: [PATCH v2 1/1] arm64: dts: rockchip: rk3528: Add CPU frequency scaling support

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Message-ID: <CABjd4YzLaAgd-5Cg9fMSAgCS6Wt6=uC8K3WRhcAtnjjg1je87Q@mail.gmail.com>
Date: Fri, 18 Jul 2025 19:03:17 +0400
From: Alexey Charkov <alchark@...il.com>
To: Chukun Pan <amadeus@....edu.cn>
Cc: conor+dt@...nel.org, devicetree@...r.kernel.org, heiko@...ech.de, 
	jonas@...boo.se, krzk+dt@...nel.org, linux-arm-kernel@...ts.infradead.org, 
	linux-kernel@...r.kernel.org, linux-rockchip@...ts.infradead.org, 
	ziyao@...root.org
Subject: Re: [PATCH v2 1/1] arm64: dts: rockchip: rk3528: Add CPU frequency
 scaling support

On Fri, Jul 18, 2025 at 6:01 PM Chukun Pan <amadeus@....edu.cn> wrote:
>
> Hi,
>
> > > Alexey suggested that we remove 408MHz, 600MHz and 816MHz from the
> > > opp-table. Do you think it is acceptable to use 850mV for 1008MHz?
> >
> > But why 850 mV? Vendor .dtsi [1] implies that chips with leakage
> > values of L0..L4 might be unstable at this frequency with a 850 mV
> > supply and need 875 mV instead.
>
> Because the actual frequency generated by 850mV is closer to 1008MHz.

Which likely means that you have an -L5 chip. It will be different on
other chips - it's a lottery of silicon quality.

> Since we removed frequencies below 1GHz, all remaining frequencies are
> generated by PVTPLL. I think it may not be necessary to use the maximum
> values of opp-microvolt* ?

Only if we deliberately ignore the unlucky users who got lower quality
silicon (-L0 to -L4). They might have problems if we run 1008 MHz at
850 mV, which PVTPLL may or may not be able to make up for (depends on
which ring length gets applied for this frequency by bl31). If those
chips didn't need higher voltage to run stable at 1008 MHz then I
doubt Rockchip engineers would have put 875 mV in their .dtsi

Best regards,
Alexey