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Message-ID: <20250719064624.690606-1-uwu@icenowy.me>
Date: Sat, 19 Jul 2025 14:46:24 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Lucas Stach <l.stach@...gutronix.de>,
Russell King <linux+etnaviv@...linux.org.uk>,
Christian Gmeiner <christian.gmeiner@...il.com>,
David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>
Cc: etnaviv@...ts.freedesktop.org,
dri-devel@...ts.freedesktop.org,
linux-kernel@...r.kernel.org,
Icenowy Zheng <uwu@...nowy.me>
Subject: [RFC PATCH] drm/etnaviv: set the 32-bit coherent DMA mask later
The etnaviv driver wants to use 40-bit DMA mask and 32-bit coherent
allocation mask, to be able to access memory up to 40-bit, but still
limit page tables to lower 32-bit.
However, the call to of_dma_configure() next to setting the masks ruined
everything -- of_dma_configure will use the coherent allocation mask to
clip the DMA accessibility mask, leads to a setup with both masks as
32-bit.
In this situation PRIME imports stop to work because of SWIOTLB getting
activated.
Set a 40-bit coherent mask before of_dma_configure() and then the real
32-bit mask after it, to prevent main DMA mask being clipped.
Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
---
This patch is marked RFC because the practice looks a little dirty.
P.S. unfortunately the testing situation isn't mainlined yet -- I am
using etnaviv as the X.org 2D accelerator on TH1520 SoC (with
xf86-video-thead DDX), and importing buffers from powervr device
(open source Vulkan driver, hacked to add xcb WSI support). Both devices
are a few patches away from mainline, and the display engine
(VeriSilicon DC8200) support is a big TODO.
drivers/gpu/drm/etnaviv/etnaviv_drv.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
index 3e91747ed339..cded63904c65 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
@@ -650,9 +650,11 @@ static int etnaviv_pdev_probe(struct platform_device *pdev)
* To make things easy, we set the dma_coherent_mask to 32
* bit to make sure we are allocating the command buffers and
* TLBs in the lower 4 GiB address space.
+ *
+ * As coherent_mask may mislead of_dma_configure(), set it to
+ * the same with main dma mask temporarily as a hack.
*/
- if (dma_set_mask(dev, DMA_BIT_MASK(40)) ||
- dma_set_coherent_mask(dev, DMA_BIT_MASK(32))) {
+ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40))) {
dev_dbg(dev, "No suitable DMA available\n");
return -ENODEV;
}
@@ -668,6 +670,13 @@ static int etnaviv_pdev_probe(struct platform_device *pdev)
of_node_put(first_node);
}
+ /*
+ * Now as of_dma_configure() is done, we're now safe to set
+ * coherent_dma_mask to the real value.
+ */
+ if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)))
+ return -ENODEV;
+
return component_master_add_with_match(dev, &etnaviv_master_ops, match);
}
--
2.50.1
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