linux-kernel - Re: [PATCH v1 0/2] NPCM845 reset and clock device tree updates

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Message-Id: <175306656659.1278425.12587512480138536293.b4-ty@codeconstruct.com.au>
Date: Mon, 21 Jul 2025 12:26:06 +0930
From: Andrew Jeffery <andrew@...econstruct.com.au>
To: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org, 
 conor+dt@...nel.org, avifishman70@...il.com, tali.perry1@...il.com, 
 joel@....id.au, venture@...gle.com, yuenn@...gle.com, 
 benjaminfair@...gle.com, Tomer Maimon <tmaimon77@...il.com>
Cc: openbmc@...ts.ozlabs.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 0/2] NPCM845 reset and clock device tree updates

On Sun, 06 Jul 2025 16:42:05 +0300, Tomer Maimon wrote:
> This series updates the NPCM845 device tree for the integrated reset and
> clock controller using the auxiliary device framework.
> Patch 1 combines the reset and clock nodes into nuvoton,npcm845-reset.
> Patch 2 adds a 25 MHz refclk and updates peripherals to use it.
> 
> Tested on NPCM845 evaluation board.
> 
> [...]

Thanks, I've applied this to be picked up through the BMC tree.

-- 
Andrew Jeffery <andrew@...econstruct.com.au>