linux-kernel - [PATCH] PCI: hide mysterious 8MB 64-bit pref BAR on Intel Arc PCIe Switch

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Message-ID: <20250721173057.867829-1-uwu@icenowy.me>
Date: Tue, 22 Jul 2025 01:30:57 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Bjorn Helgaas <bhelgaas@...gle.com>,
	Lucas De Marchi <lucas.demarchi@...el.com>,
	Thomas Hellström <thomas.hellstrom@...ux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@...el.com>
Cc: linux-pci@...r.kernel.org,
	intel-xe@...ts.freedesktop.org,
	linux-kernel@...r.kernel.org,
	Han Gao <rabenda.cn@...il.com>,
	Vivian Wang <wangruikang@...as.ac.cn>,
	Icenowy Zheng <uwu@...nowy.me>
Subject: [PATCH] PCI: hide mysterious 8MB 64-bit pref BAR on Intel Arc PCIe Switch

The upstream port device of Intel Arc series dGPUs' internal PCIe switch
contains a mysterious 8MB 64-bit prefetchable BAR. All reads to memory
mapped to that BAR returns 0xFFFFFFFF and writes have no effect.

When the PCI bus isn't configured by any firmware (e.g. a PCIe
controller solely initialized by Linux kernel), the PCI space allocation
algorithm of Linux will allocate the main VRAM BAR of Arc dGPU device at
base+0, and then the 8MB BAR at base+256M, which prevents the main VRAM
BAR gets resized. As the functionality and performance of Arc dGPU will
get severely restricted with small BAR, this makes a problem.

Hide the mysterious 8MB BAR to Linux PCI subsystem, to allow resizing
the VRAM BAR to VRAM size with the Linux PCI space allocation algorithm.

Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
---
 drivers/pci/quirks.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index d7f4ee634263..df304bfec6e9 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3650,6 +3650,22 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x37d0, quirk_broken_intx_masking);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x37d1, quirk_broken_intx_masking);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x37d2, quirk_broken_intx_masking);
 
+/*
+ * Intel Arc dGPUs' internal switch upstream port contains a mysterious 8MB
+ * 64-bit prefetchable BAR that blocks resize of main dGPU VRAM BAR with
+ * Linux's PCI space allocation algorithm.
+ */
+static void quirk_intel_xe_upstream(struct pci_dev *pdev)
+{
+	memset(&pdev->resource[0], 0, sizeof(pdev->resource[0]));
+}
+/* Intel Arc A380 PCI Express Switch Upstream Port */
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x4fa1, quirk_intel_xe_upstream);
+/* Intel Arc A770 PCI Express Switch Upstream Port */
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x4fa0, quirk_intel_xe_upstream);
+/* Intel Arc B580 PCI Express Switch Upstream Port */
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xe2ff, quirk_intel_xe_upstream);
+
 static u16 mellanox_broken_intx_devs[] = {
 	PCI_DEVICE_ID_MELLANOX_HERMON_SDR,
 	PCI_DEVICE_ID_MELLANOX_HERMON_DDR,
-- 
2.50.1