[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20250721081459.16278-2-laura.nao@collabora.com>
Date: Mon, 21 Jul 2025 10:14:51 +0200
From: Laura Nao <laura.nao@...labora.com>
To: srini@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
rafael@...nel.org,
daniel.lezcano@...aro.org,
rui.zhang@...el.com,
lukasz.luba@....com,
matthias.bgg@...il.com,
angelogioacchino.delregno@...labora.com
Cc: nfraprado@...labora.com,
arnd@...db.de,
colin.i.king@...il.com,
u.kleine-koenig@...libre.com,
andrew-ct.chen@...iatek.com,
lala.lin@...iatek.com,
bchihi@...libre.com,
frank-w@...lic-files.de,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
kernel@...labora.com,
Laura Nao <laura.nao@...labora.com>
Subject: [PATCH 1/9] dt-bindings: thermal: mediatek: Add LVTS thermal controller support for MT8196
Add LVTS thermal controller binding for MediaTek MT8196.
Signed-off-by: Laura Nao <laura.nao@...labora.com>
---
.../thermal/mediatek,lvts-thermal.yaml | 2 ++
.../thermal/mediatek,lvts-thermal.h | 26 +++++++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
index 0259cd3ce9c5..beccdabe110b 100644
--- a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
+++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
@@ -26,6 +26,8 @@ properties:
- mediatek,mt8192-lvts-mcu
- mediatek,mt8195-lvts-ap
- mediatek,mt8195-lvts-mcu
+ - mediatek,mt8196-lvts-ap
+ - mediatek,mt8196-lvts-mcu
reg:
maxItems: 1
diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
index ddc7302a510a..0ec8ad184d47 100644
--- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
+++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
@@ -80,4 +80,30 @@
#define MT8192_AP_MD1 15
#define MT8192_AP_MD2 16
+#define MT8196_MCU_MEDIUM_CPU6_0 0
+#define MT8196_MCU_MEDIUM_CPU6_1 1
+#define MT8196_MCU_DSU2 2
+#define MT8196_MCU_DSU3 3
+#define MT8196_MCU_LITTLE_CPU3 4
+#define MT8196_MCU_LITTLE_CPU0 5
+#define MT8196_MCU_LITTLE_CPU1 6
+#define MT8196_MCU_LITTLE_CPU2 7
+#define MT8196_MCU_MEDIUM_CPU4_0 8
+#define MT8196_MCU_MEDIUM_CPU4_1 9
+#define MT8196_MCU_MEDIUM_CPU5_0 10
+#define MT8196_MCU_MEDIUM_CPU5_1 11
+#define MT8196_MCU_DSU0 12
+#define MT8196_MCU_DSU1 13
+#define MT8196_MCU_BIG_CPU7_0 14
+#define MT8196_MCU_BIG_CPU7_1 15
+
+#define MT8196_AP_TOP0 0
+#define MT8196_AP_TOP1 1
+#define MT8196_AP_TOP2 2
+#define MT8196_AP_TOP3 3
+#define MT8196_AP_BOT0 4
+#define MT8196_AP_BOT1 5
+#define MT8196_AP_BOT2 6
+#define MT8196_AP_BOT3 7
+
#endif /* __MEDIATEK_LVTS_DT_H */
--
2.39.5
Powered by blists - more mailing lists