linux-kernel - Re: [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add Glymur pinctrl bindings

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Message-ID: <122bd07a-0993-4950-ab2e-c2c5289fd0af@kernel.org>
Date: Mon, 21 Jul 2025 16:36:24 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Pankaj Patil <pankaj.patil@....qualcomm.com>, andersson@...nel.org,
 linus.walleij@...aro.org, robh@...nel.org, krzk+dt@...nel.org,
 conor+dt@...nel.org, quic_rjendra@...cinc.com
Cc: linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add Glymur pinctrl
 bindings

On 21/07/2025 16:30, Pankaj Patil wrote:
> Add DeviceTree binding for Glymur SoC TLMM block
> ---
> Changes in v2:
> Updated gpio-line-names maxItems to 250
> Fixed example node reg property
> 
> Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>


This is not correctly formatted patch. Your SoB is gone. Apply it
yourself and see the result.

> ---
>  .../bindings/pinctrl/qcom,glymur-tlmm.yaml    | 128 ++++++++++++++++++
>  1 file changed, 128 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml
> 

...

> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    tlmm: pinctrl@...0000 {
> +        compatible = "qcom,glymur-tlmm";
> +        reg = <0x0f100000 0xf00000>;
> +        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> +        gpio-controller;
> +        #gpio-cells = <2>;
> +        interrupt-controller;
> +        #interrupt-cells = <2>;
> +        gpio-ranges = <&tlmm 0 0 249>;
> +        wakeup-parent = <&pdc>;
> +        gpio-reserved-ranges = <4 4>, <10 2>, <33 3>, <44 4>;
> +        qup_uart21_default: qup-uart21-default-state {
> +          tx-pins {

Still messed indentation.



Best regards,
Krzysztof