[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d48e42ca-a9ac-4bd0-840a-86a975900322@amd.com>
Date: Tue, 22 Jul 2025 17:37:15 +0200
From: Michal Simek <michal.simek@....com>
To: Conor Dooley <conor@...nel.org>
Cc: linux-kernel@...r.kernel.org, monstr@...str.eu, michal.simek@...inx.com,
git@...inx.com, Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>, Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Palmer Dabbelt
<palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh@...nel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"open list:RISC-V ARCHITECTURE" <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH] dt-bindings: riscv: cpus: Add AMD MicroBlaze V 64bit
compatible
On 7/22/25 17:18, Conor Dooley wrote:
> On Tue, Jul 22, 2025 at 09:25:40AM +0200, Michal Simek wrote:
>> 32bit version has been added by commit 4a6b93f56296 ("dt-bindings: riscv:
>> cpus: Add AMD MicroBlaze V compatible") but 64bit version also exists and
>> should be covered by binding too.
>>
>> Signed-off-by: Michal Simek <michal.simek@....com>
>
> Acked-by: Conor Dooley <conor.dooley@...rochip.com>
>
> Although maybe I should pick this up myself? LMK if you want me to,
> rather than it going via the xilinx tree.
Please pick it up.
Thanks,
Michal
Powered by blists - more mailing lists