linux-kernel - Re: [PATCH V3 1/1] arm64: dts: qcom: qcs8300: Add EPSS l3 interconnect provider node and CPUCP OPP tables to scale DDR/L3

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Message-ID: <l6lwso53m3roxggh2dy44iaebrlfxy34mpu66kjlknxig6y7ir@5eklfdr346ab>
Date: Tue, 22 Jul 2025 09:25:04 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Raviteja Laggyshetty <raviteja.laggyshetty@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Odelu Kukatla <quic_okukatla@...cinc.com>,
        Imran Shaik <quic_imrashai@...cinc.com>,
        Mike Titpon <mike.tipton@....qualcomm.com>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH V3 1/1] arm64: dts: qcom: qcs8300: Add EPSS l3
 interconnect provider node and CPUCP OPP tables to scale DDR/L3

On Tue, Jul 22, 2025 at 05:50:39AM +0000, Raviteja Laggyshetty wrote:
> Add Epoch Subsystem (EPSS) L3 interconnect provider node and OPP tables
> required to scale DDR and L3 per freq-domain on QCS8300 platform.
> As QCS8300 and SA8775P SoCs have same EPSS hardware, added SA8775P
> compatible as fallback for QCS8300 EPSS device node.
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> Co-developed-by: Imran Shaik <quic_imrashai@...cinc.com>
> Signed-off-by: Imran Shaik <quic_imrashai@...cinc.com>
> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@....qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs8300.dtsi | 301 ++++++++++++++++++++++++++
>  1 file changed, 301 insertions(+)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>


-- 
With best wishes
Dmitry