linux-kernel - Re: [PATCH 07/11] arm64: dts: rockchip: Add USB nodes for RK3528

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20250723143006.1083489-1-amadeus@jmu.edu.cn>
Date: Wed, 23 Jul 2025 22:30:06 +0800
From: Chukun Pan <amadeus@....edu.cn>
To: jonas@...boo.se
Cc: amadeus@....edu.cn,
	conor+dt@...nel.org,
	devicetree@...r.kernel.org,
	heiko@...ech.de,
	kishon@...nel.org,
	krzk+dt@...nel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-phy@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org,
	robh@...nel.org,
	vkoul@...nel.org,
	ziyao@...root.org
Subject: Re: [PATCH 07/11] arm64: dts: rockchip: Add USB nodes for RK3528

Hi,

> The DWC3 node does not contain any default phys because out of current
> and pending supported boards only one board, ROCK 2A, can use USB3.
> Remaining boards use the Naneng Combo PHY for PCIe instead of USB3.

I have other RK3528 boards with USB3 and can test this in a few days.
Or do you think that usb3-phy should be added in the dts of the device?

> diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> index 85bc3f5aa2c7..3e51a3f51e05 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> @@ -243,6 +243,29 @@ soc {
>  		#address-cells = <2>;
>  		#size-cells = <2>;
> 
> +		usb_host0_xhci: usb@...00000 {
> +			compatible = "rockchip,rk3528-dwc3", "snps,dwc3";
> +			reg = <0x0 0xfe500000 0x0 0x400000>;
> +			clocks = <&cru CLK_REF_USB3OTG>,
> +				 <&cru CLK_SUSPEND_USB3OTG>,
> +				 <&cru ACLK_USB3OTG>;
> +			clock-names = "ref_clk", "suspend_clk", "bus_clk";
> +			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> +			power-domains = <&power RK3528_PD_VPU>;
> +			resets = <&cru SRST_A_USB3OTG>;
> +			dr_mode = "otg";
> +			phy_type = "utmi_wide";
> +			snps,dis_enblslpm_quirk;
> +			snps,dis-del-phy-power-chg-quirk;
> +			snps,dis-tx-ipgap-linecheck-quirk;
> +			snps,dis-u1-entry-quirk;
> +			snps,dis-u2-entry-quirk;
> +			snps,dis-u2-freeclk-exists-quirk;
> +			snps,parkmode-disable-hs-quirk;
> +			snps,parkmode-disable-ss-quirk;

Maybe "snps,dis_u2_susphy_quirk" is needed?
Downstream kernels add this on USB2.0 only devices:
https://github.com/rockchip-linux/kernel/blob/develop-5.10/arch/arm64/boot/dts/rockchip/rk3528-demo.dtsi#L474

> +		u2phy: usb2phy@...f0000 {
> +			u2phy_otg: otg-port {
> +			u2phy_host: host-port {

I think it would be better to call it usb2phy, usb2phy0_otg and usb2phy0_host?
In this way, we can put these USB nodes close together in the device's dts.

--
2.25.1