linux-kernel - Re: [PATCH v3 07/19] dt-bindings: memory: factorise LPDDR channel binding into memory channel

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20250723-zealous-turtle-of-perfection-e67aee@kuoka>
Date: Wed, 23 Jul 2025 08:57:11 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Clément Le Goffic <clement.legoffic@...s.st.com>
Cc: Will Deacon <will@...nel.org>, Mark Rutland <mark.rutland@....com>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Maxime Coquelin <mcoquelin.stm32@...il.com>, 
	Alexandre Torgue <alexandre.torgue@...s.st.com>, Philipp Zabel <p.zabel@...gutronix.de>, 
	Jonathan Corbet <corbet@....net>, Gatien Chevallier <gatien.chevallier@...s.st.com>, 
	Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Gabriel Fernandez <gabriel.fernandez@...s.st.com>, Le Goffic <legoffic.clement@...il.com>, 
	Julius Werner <jwerner@...omium.org>, linux-arm-kernel@...ts.infradead.org, 
	linux-perf-users@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-stm32@...md-mailman.stormreply.com, linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org, 
	linux-clk@...r.kernel.org
Subject: Re: [PATCH v3 07/19] dt-bindings: memory: factorise LPDDR channel
 binding into memory channel

On Tue, Jul 22, 2025 at 04:03:24PM +0200, Clément Le Goffic wrote:
> LPDDR and DDR channels exist and share the same properties, they have a
> compatible, ranks, and an io-width.

Maybe it is true for all types of SDRAM, like RDRAM and eDRAM, but I
don't think all memory types do.

I think this should be renamed to sdram-channel.

> 
> Signed-off-by: Clément Le Goffic <clement.legoffic@...s.st.com>
> ---
>  ...pddr-channel.yaml => jedec,memory-channel.yaml} | 26 +++++++++++-----------
>  1 file changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,memory-channel.yaml
> similarity index 82%
> rename from Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml
> rename to Documentation/devicetree/bindings/memory-controllers/ddr/jedec,memory-channel.yaml
> index 34b5bd153f63..3bf3a63466eb 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml
> +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,memory-channel.yaml
> @@ -1,16 +1,16 @@
>  # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>  %YAML 1.2
>  ---
> -$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
> +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,memory-channel.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>  
> -title: LPDDR channel with chip/rank topology description
> +title: Memory channel with chip/rank topology description
>  
>  description:
> -  An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,
> -  CK, etc.) that connect one or more LPDDR chips to a host system. The main
> -  purpose of this node is to overall LPDDR topology of the system, including the
> -  amount of individual LPDDR chips and the ranks per chip.
> +  A memory channel is a completely independent set of pins (DQ, CA, CS,

A memory channel of SDRAM memory like DDR SDRAM or LPDDR SDRAM is ...

> +  CK, etc.) that connect one or more memory chips to a host system. The main
> +  purpose of this node is to overall memory topology of the system, including the
> +  amount of individual memory chips and the ranks per chip.
>  
>  maintainers:
>    - Julius Werner <jwerner@...omium.org>
> @@ -26,14 +26,14 @@ properties:
>    io-width:
>      description:
>        The number of DQ pins in the channel. If this number is different
> -      from (a multiple of) the io-width of the LPDDR chip, that means that
> +      from (a multiple of) the io-width of the memory chip, that means that
>        multiple instances of that type of chip are wired in parallel on this
>        channel (with the channel's DQ pins split up between the different
>        chips, and the CA, CS, etc. pins of the different chips all shorted
>        together).  This means that the total physical memory controlled by a
>        channel is equal to the sum of the densities of each rank on the
> -      connected LPDDR chip, times the io-width of the channel divided by
> -      the io-width of the LPDDR chip.
> +      connected memory chip, times the io-width of the channel divided by
> +      the io-width of the memory chip.
>      enum:
>        - 8
>        - 16
> @@ -51,8 +51,8 @@ patternProperties:
>    "^rank@[0-9]+$":
>      type: object
>      description:
> -      Each physical LPDDR chip may have one or more ranks. Ranks are
> -      internal but fully independent sub-units of the chip. Each LPDDR bus
> +      Each physical memory chip may have one or more ranks. Ranks are
> +      internal but fully independent sub-units of the chip. Each memory bus
>        transaction on the channel targets exactly one rank, based on the
>        state of the CS pins. Different ranks may have different densities and
>        timing requirements.
> @@ -107,7 +107,7 @@ additionalProperties: false
>  
>  examples:
>    - |
> -    lpddr-channel0 {
> +    memory-channel0 {

If doing this, then separate commit based on generic node name
convention. But then we need to come with generic node name first,
sdram-channel?

And also '-0', not '0' suffix.

Best regards,
Krzysztof