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Message-ID: <175325504976.1420.2666973232153470630.tip-bot2@tip-bot2>
Date: Wed, 23 Jul 2025 07:17:29 -0000
From: "tip-bot2 for Will McVicker" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Donghoon Yu <hoony.yu@...sung.com>,
Youngmin Nam <youngmin.nam@...sung.com>, John Stultz <jstultz@...gle.com>,
Will McVicker <willmcvicker@...gle.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: timers/clocksource] clocksource/drivers/exynos_mct: Don't
register as a sched_clock on arm64
The following commit has been merged into the timers/clocksource branch of tip:
Commit-ID: 394b981382e6198363cf513f6eb6be4c55b22e44
Gitweb: https://git.kernel.org/tip/394b981382e6198363cf513f6eb6be4c55b22e44
Author: Will McVicker <willmcvicker@...gle.com>
AuthorDate: Fri, 20 Jun 2025 11:17:05 -07:00
Committer: Daniel Lezcano <daniel.lezcano@...aro.org>
CommitterDate: Tue, 15 Jul 2025 13:00:50 +02:00
clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64
The MCT register is unfortunately very slow to access, but importantly
does not halt in the c2 idle state. So for ARM64, we can improve
performance by not registering the MCT for sched_clock, allowing the
system to use the faster ARM architected timer for sched_clock instead.
The MCT is still registered as a clocksource, and a clockevent in order
to be a wakeup source for the arch_timer to exit the "c2" idle state.
Since ARM32 SoCs don't have an architected timer, the MCT must continue
to be used for sched_clock. Detailed discussion on this topic can be
found at [1].
[1] https://lore.kernel.org/linux-samsung-soc/1400188079-21832-1-git-send-email-chirantan@chromium.org/
[Original commit from https://android.googlesource.com/kernel/gs/+/630817f7080e92c5e0216095ff52f6eb8dd00727
Signed-off-by: Donghoon Yu <hoony.yu@...sung.com>
Signed-off-by: Youngmin Nam <youngmin.nam@...sung.com>
Reviewed-by: Youngmin Nam <youngmin.nam@...sung.com>
Acked-by: John Stultz <jstultz@...gle.com>
Tested-by: Youngmin Nam <youngmin.nam@...sung.com>
Signed-off-by: Will McVicker <willmcvicker@...gle.com>
Link: https://lore.kernel.org/r/20250620181719.1399856-3-willmcvicker@google.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
---
drivers/clocksource/exynos_mct.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index da09f46..96361d5 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -219,12 +219,18 @@ static struct clocksource mct_frc = {
.resume = exynos4_frc_resume,
};
+/*
+ * Since ARM devices do not have an architected timer, they need to continue
+ * using the MCT as the main clocksource for timekeeping, sched_clock, and the
+ * delay timer. For AARCH64 SoCs, the architected timer is the preferred
+ * clocksource due to it's superior performance.
+ */
+#if defined(CONFIG_ARM)
static u64 notrace exynos4_read_sched_clock(void)
{
return exynos4_read_count_32();
}
-#if defined(CONFIG_ARM)
static struct delay_timer exynos4_delay_timer;
static cycles_t exynos4_read_current_timer(void)
@@ -250,12 +256,13 @@ static int __init exynos4_clocksource_init(bool frc_shared)
exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
exynos4_delay_timer.freq = clk_rate;
register_current_timer_delay(&exynos4_delay_timer);
+
+ sched_clock_register(exynos4_read_sched_clock, 32, clk_rate);
#endif
if (clocksource_register_hz(&mct_frc, clk_rate))
panic("%s: can't register clocksource\n", mct_frc.name);
- sched_clock_register(exynos4_read_sched_clock, 32, clk_rate);
return 0;
}
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