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Message-ID: <a3846433-f1f8-4b83-a965-baec24ee5159@kernel.org>
Date: Thu, 24 Jul 2025 16:42:41 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Marijn Suijten <marijn.suijten@...ainline.org>,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] dt-bindings: clock: qcom: Add SM8750 GPU clocks
On 24/07/2025 12:53, Konrad Dybcio wrote:
> On 7/24/25 10:18 AM, Krzysztof Kozlowski wrote:
>> On Wed, Jul 23, 2025 at 10:38:48PM +0200, Konrad Dybcio wrote:
>>> From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
>>>
>>> The SM8750 features a "traditional" GPU_CC block, much of which is
>>> controlled through the GMU microcontroller. Additionally, there's
>>> an separate GX_CC block, where the GX GDSC is moved.
>>>
>>> Add bindings to accommodate for that.
>>>
>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
>>> ---
>
> [...]
>
>>> +title: Qualcomm Graphics Clock & Reset Controller on SM8750
>>
>> There is no clocks nor resets here. Only power domains.
>
> There are clocks and resets in this IP block (inside the register
> space mentioned in the dt patch/example), but the OS is not supposed
> to poke at them (it can in theory, but we have a uC - the GMU -
> doing the same thing so it would be stepping on one another's toes..).
> Not sure how to express that.
>
> I could for example add #define indices in include/dt-bindings, listing
> out the clocks and never consume them. Does that sound fair?
Explain that in the binding description.
>
>>
>>> +
>>> +maintainers:
>>> + - Konrad Dybcio <konradybcio@...nel.org>
>>> +
>>> +description: |
>>> + Qualcomm graphics clock control module provides the clocks, resets and power
>>
>> Also confusing.
>>
>>> + domains on Qualcomm SoCs.
>>> +
>>> + See also:
>>> + include/dt-bindings/reset/qcom,sm8750-gpucc.h
>>
>> reset or clock path?
>
> Ugh, clock
>
>>
>>> +
>>> +properties:
>>> + compatible:
>>> + enum:
>>> + - qcom,sm8750-gxcc
>>> +
>>> + reg:
>>> + maxItems: 1
>>> +
>>> + power-domains:
>>> + items:
>>> + - description: GFX voltage rail
>>> + - description: MX_COLLAPSIBLE voltage rail
>>> + - description: GPU_CC_CX GDSC
>>> +
>>> + '#power-domain-cells':
>>> + const: 1
>>> +
>>> +required:
>>> + - compatible
>>> + - power-domains
>>> + - '#power-domain-cells'
>>> +
>>
>> You miss ref... or this is a bit confusing.
> ref to what? qcom,gcc? I specifically omitted it, as that adds
> requirements which you stated above.
Yes, qcom,gcc. If that was missing intentionally, it is fine assuming
you implement the rest of comments.
Best regards,
Krzysztof
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