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Message-ID: <ca3ac027-3cd0-4093-90b2-6e097e7f8cf8@quicinc.com>
Date: Thu, 24 Jul 2025 13:06:08 +0530
From: Ram Kumar Dwivedi <quic_rdwivedi@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
CC: <mani@...nel.org>, <alim.akhtar@...sung.com>, <avri.altman@....com>,
        <bvanassche@....org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <James.Bottomley@...senpartnership.com>,
        <martin.petersen@...cle.com>, <agross@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-scsi@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/3] arm64: dts: qcom: sa8155: Add gear and rate limit
 properties to UFS



On 23-Jul-25 12:25 AM, Dmitry Baryshkov wrote:
> On Tue, Jul 22, 2025 at 09:41:02PM +0530, Ram Kumar Dwivedi wrote:
>> Add optional limit-hs-gear and limit-rate properties to the UFS node to
>> support automotive use cases that require limiting the maximum Tx/Rx HS
>> gear and rate due to hardware constraints.
> 
> 
> If they are optional and they are for automotive, then why are you
> adding them to the SM8150 DTSi file, enforcing them for all SM8150
> targets?
> 
Hi Dmitry,

I have moved them to board specific file sa8155p.dtsi in latest patchset.

Thanks,
Ram.



>>
>> Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@...cinc.com>
>> ---
>>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> index b5494bcf5cff..87e8b60b3b2d 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> @@ -2082,6 +2082,9 @@ ufs_mem_hc: ufshc@...4000 {
>>  			resets = <&gcc GCC_UFS_PHY_BCR>;
>>  			reset-names = "rst";
>>  
>> +			limit-hs-gear = <3>;
>> +			limit-rate = <1>;
>> +
>>  			iommus = <&apps_smmu 0x300 0>;
>>  
>>  			clock-names =
>> -- 
>> 2.50.1
>>
> 


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