lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250724083914.61351-9-angelogioacchino.delregno@collabora.com>
Date: Thu, 24 Jul 2025 10:38:44 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: linux-mediatek@...ts.infradead.org,
	robh@...nel.org
Cc: herbert@...dor.apana.org.au,
	davem@...emloft.net,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	chunkuang.hu@...nel.org,
	p.zabel@...gutronix.de,
	airlied@...il.com,
	simona@...ll.ch,
	maarten.lankhorst@...ux.intel.com,
	mripard@...nel.org,
	tzimmermann@...e.de,
	jassisinghbrar@...il.com,
	mchehab@...nel.org,
	matthias.bgg@...il.com,
	angelogioacchino.delregno@...labora.com,
	chunfeng.yun@...iatek.com,
	vkoul@...nel.org,
	kishon@...nel.org,
	sean.wang@...nel.org,
	linus.walleij@...aro.org,
	lgirdwood@...il.com,
	broonie@...nel.org,
	andersson@...nel.org,
	mathieu.poirier@...aro.org,
	daniel.lezcano@...aro.org,
	tglx@...utronix.de,
	atenart@...nel.org,
	jitao.shi@...iatek.com,
	ck.hu@...iatek.com,
	houlong.wei@...iatek.com,
	kyrie.wu@...iatek.corp-partner.google.com,
	andy.teng@...iatek.com,
	tinghan.shen@...iatek.com,
	jiaxin.yu@...iatek.com,
	shane.chien@...iatek.com,
	olivia.wen@...iatek.com,
	granquet@...libre.com,
	eugen.hristev@...aro.org,
	arnd@...db.de,
	sam.shih@...iatek.com,
	jieyy.yang@...iatek.com,
	frank-w@...lic-files.de,
	mwalle@...nel.org,
	fparent@...libre.com,
	linux-crypto@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	dri-devel@...ts.freedesktop.org,
	linux-media@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-phy@...ts.infradead.org,
	linux-gpio@...r.kernel.org,
	linux-remoteproc@...r.kernel.org,
	linux-sound@...r.kernel.org
Subject: [PATCH 08/38] dt-bindings: pinctrl: mediatek,mt7622-pinctrl: Add missing base reg

The pin controller for both MT7622 and MT7629 need both a "base"
and an "eint" MMIO like the ones found on other MediaTek SoCs:
while devicetrees have always been correct, the binding is not,
as it only allows an "eint" reg.

Add "base" to reg-names and increment maxItems for reg to two.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
 .../devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml   | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
index 57b19031925d..a6a1d321bb26 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
@@ -19,10 +19,11 @@ properties:
       - mediatek,mt7629-pinctrl
 
   reg:
-    maxItems: 1
+    maxItems: 2
 
   reg-names:
     items:
+      - const: base
       - const: eint
 
   gpio-controller: true
-- 
2.50.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ