lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250724083914.61351-28-angelogioacchino.delregno@collabora.com>
Date: Thu, 24 Jul 2025 10:39:03 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: linux-mediatek@...ts.infradead.org,
	robh@...nel.org
Cc: herbert@...dor.apana.org.au,
	davem@...emloft.net,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	chunkuang.hu@...nel.org,
	p.zabel@...gutronix.de,
	airlied@...il.com,
	simona@...ll.ch,
	maarten.lankhorst@...ux.intel.com,
	mripard@...nel.org,
	tzimmermann@...e.de,
	jassisinghbrar@...il.com,
	mchehab@...nel.org,
	matthias.bgg@...il.com,
	angelogioacchino.delregno@...labora.com,
	chunfeng.yun@...iatek.com,
	vkoul@...nel.org,
	kishon@...nel.org,
	sean.wang@...nel.org,
	linus.walleij@...aro.org,
	lgirdwood@...il.com,
	broonie@...nel.org,
	andersson@...nel.org,
	mathieu.poirier@...aro.org,
	daniel.lezcano@...aro.org,
	tglx@...utronix.de,
	atenart@...nel.org,
	jitao.shi@...iatek.com,
	ck.hu@...iatek.com,
	houlong.wei@...iatek.com,
	kyrie.wu@...iatek.corp-partner.google.com,
	andy.teng@...iatek.com,
	tinghan.shen@...iatek.com,
	jiaxin.yu@...iatek.com,
	shane.chien@...iatek.com,
	olivia.wen@...iatek.com,
	granquet@...libre.com,
	eugen.hristev@...aro.org,
	arnd@...db.de,
	sam.shih@...iatek.com,
	jieyy.yang@...iatek.com,
	frank-w@...lic-files.de,
	mwalle@...nel.org,
	fparent@...libre.com,
	linux-crypto@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	dri-devel@...ts.freedesktop.org,
	linux-media@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-phy@...ts.infradead.org,
	linux-gpio@...r.kernel.org,
	linux-remoteproc@...r.kernel.org,
	linux-sound@...r.kernel.org
Subject: [PATCH 27/38] arm64: dts: mediatek: mt7988a: Fix PCI-Express T-PHY node address

The PCIe and USB TPHYs are under the soc bus, which provides MMIO,
and all nodes under that must use the bus, otherwise those would
clearly be out of place.

Add ranges to both the tphy(s) and assign the address to the main
node to silence a dtbs_check warning, and fix the children to
use the MMIO range of t-phy.

Fixes: ("f693e6ba55ae arm64: dts: mediatek: mt7988: Add t-phy for ssusb1")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 28 +++++++++++------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
index 560ec86dbec0..cc0d3e3f4374 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
@@ -629,20 +629,20 @@ pcie_intc1: interrupt-controller {
 		tphy: t-phy@...50000 {
 			compatible = "mediatek,mt7986-tphy",
 				     "mediatek,generic-tphy-v2";
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0x11c50000 0x1000>;
 			status = "disabled";
 
-			tphyu2port0: usb-phy@...50000 {
-				reg = <0 0x11c50000 0 0x700>;
+			tphyu2port0: usb-phy@0 {
+				reg = <0 0x700>;
 				clocks = <&infracfg CLK_INFRA_USB_UTMI_CK_P1>;
 				clock-names = "ref";
 				#phy-cells = <1>;
 			};
 
-			tphyu3port0: usb-phy@...50700 {
-				reg = <0 0x11c50700 0 0x900>;
+			tphyu3port0: usb-phy@700 {
+				reg = <0 0x700 0 0x900>;
 				clocks = <&infracfg CLK_INFRA_USB_PIPE_CK_P1>;
 				clock-names = "ref";
 				#phy-cells = <1>;
@@ -659,20 +659,20 @@ topmisc: system-controller@...10084 {
 		xsphy: xs-phy@...10000 {
 			compatible = "mediatek,mt7988-xsphy",
 				     "mediatek,xsphy";
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0x11e10000 0x3900>;
 			status = "disabled";
 
-			xphyu2port0: usb-phy@...10000 {
-				reg = <0 0x11e10000 0 0x400>;
+			xphyu2port0: usb-phy@0 {
+				reg = <0 0x400>;
 				clocks = <&infracfg CLK_INFRA_USB_UTMI>;
 				clock-names = "ref";
 				#phy-cells = <1>;
 			};
 
-			xphyu3port0: usb-phy@...13000 {
-				reg = <0 0x11e13400 0 0x500>;
+			xphyu3port0: usb-phy@...0 {
+				reg = <0x3400 0x500>;
 				clocks = <&infracfg CLK_INFRA_USB_PIPE>;
 				clock-names = "ref";
 				#phy-cells = <1>;
-- 
2.50.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ