linux-kernel - Re: [PATCH v3 0/4] Enable cpufreq for IPQ5424

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Message-ID: <aIIMAZ9tkTiU6QR2@hu-varada-blr.qualcomm.com>
Date: Thu, 24 Jul 2025 16:03:37 +0530
From: Varadarajan Narayanan <quic_varada@...cinc.com>
To: <andersson@...nel.org>, <mturquette@...libre.com>, <sboyd@...nel.org>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <konradybcio@...nel.org>, <rafael@...nel.org>,
        <viresh.kumar@...aro.org>, <ilia.lin@...nel.org>, <djakov@...nel.org>,
        <quic_srichara@...cinc.com>, <quic_mdalam@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-pm@...r.kernel.org>
Subject: Re: [PATCH v3 0/4] Enable cpufreq for IPQ5424

On Thu, Jul 24, 2025 at 03:55:36PM +0530, Varadarajan Narayanan wrote:
> CPU on Qualcomm ipq5424 is clocked by huayra PLL with RCG support.
> Add support for the APSS PLL, RCG and clock enable for ipq5424.
> The PLL, RCG register space are clubbed. Hence adding new APSS driver
> for both PLL and RCG/CBC control. Also the L3 cache has a separate pll
> modeled as ICC clock. The L3 pll needs to be scaled along with the CPU.
>
> v2: https://lore.kernel.org/linux-arm-msm/20250723110815.2865403-1-quic_varada@quicinc.com/
>
> v1: https://lore.kernel.org/linux-arm-msm/20250127093128.2611247-1-quic_srichara@quicinc.com/

Ignore this, missed Kryzstof's comments. Will post a new version
after addressing those comments.

Thanks
Varada