linux-kernel - Re: [PATCH v9 36/43] arm64: RME: Initialize PMCR.N with number counter supported by RMM

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Message-ID: <20250724104744.GC2753450@e124191.cambridge.arm.com>
Date: Thu, 24 Jul 2025 11:47:44 +0100
From: Joey Gouly <joey.gouly@....com>
To: Steven Price <steven.price@....com>
Cc: kvm@...r.kernel.org, kvmarm@...ts.linux.dev,
	Jean-Philippe Brucker <jean-philippe@...aro.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Marc Zyngier <maz@...nel.org>, Will Deacon <will@...nel.org>,
	James Morse <james.morse@....com>,
	Oliver Upton <oliver.upton@...ux.dev>,
	Suzuki K Poulose <suzuki.poulose@....com>,
	Zenghui Yu <yuzenghui@...wei.com>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Alexandru Elisei <alexandru.elisei@....com>,
	Christoffer Dall <christoffer.dall@....com>,
	Fuad Tabba <tabba@...gle.com>, linux-coco@...ts.linux.dev,
	Ganapatrao Kulkarni <gankulkarni@...amperecomputing.com>,
	Gavin Shan <gshan@...hat.com>,
	Shanker Donthineni <sdonthineni@...dia.com>,
	Alper Gun <alpergun@...gle.com>,
	"Aneesh Kumar K . V" <aneesh.kumar@...nel.org>,
	Emi Kisanuki <fj0570is@...itsu.com>
Subject: Re: [PATCH v9 36/43] arm64: RME: Initialize PMCR.N with number
 counter supported by RMM

On Wed, Jun 11, 2025 at 11:48:33AM +0100, Steven Price wrote:
> From: Jean-Philippe Brucker <jean-philippe@...aro.org>
> 
> Provide an accurate number of available PMU counters to userspace when
> setting up a Realm.
> 
> Signed-off-by: Jean-Philippe Brucker <jean-philippe@...aro.org>
> Signed-off-by: Steven Price <steven.price@....com>
> Reviewed-by: Gavin Shan <gshan@...hat.com>
> Reviewed-by: Suzuki K Poulose <suzuki.poulose@....com>

Reviewed-by: Joey Gouly <joey.gouly@....com>

> ---
>  arch/arm64/include/asm/kvm_rme.h | 1 +
>  arch/arm64/kvm/pmu-emul.c        | 3 +++
>  arch/arm64/kvm/rme.c             | 5 +++++
>  3 files changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/kvm_rme.h b/arch/arm64/include/asm/kvm_rme.h
> index c8564d5aaff4..ee10fc3c1f3d 100644
> --- a/arch/arm64/include/asm/kvm_rme.h
> +++ b/arch/arm64/include/asm/kvm_rme.h
> @@ -93,6 +93,7 @@ struct realm_rec {
>  void kvm_init_rme(void);
>  u32 kvm_realm_ipa_limit(void);
>  u32 kvm_realm_vgic_nr_lr(void);
> +u8 kvm_realm_max_pmu_counters(void);
>  
>  u64 kvm_realm_reset_id_aa64dfr0_el1(const struct kvm_vcpu *vcpu, u64 val);
>  
> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index 83f957ed0b80..0afe93bc5527 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -1014,6 +1014,9 @@ u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm)
>  {
>  	struct arm_pmu *arm_pmu = kvm->arch.arm_pmu;
>  
> +	if (kvm_is_realm(kvm))
> +		return kvm_realm_max_pmu_counters();
> +
>  	/*
>  	 * PMUv3 requires that all event counters are capable of counting any
>  	 * event, though the same may not be true of non-PMUv3 hardware.
> diff --git a/arch/arm64/kvm/rme.c b/arch/arm64/kvm/rme.c
> index bf814f45a387..a31920e05cf7 100644
> --- a/arch/arm64/kvm/rme.c
> +++ b/arch/arm64/kvm/rme.c
> @@ -87,6 +87,11 @@ u32 kvm_realm_vgic_nr_lr(void)
>  	return u64_get_bits(rmm_feat_reg0, RMI_FEATURE_REGISTER_0_GICV3_NUM_LRS);
>  }
>  
> +u8 kvm_realm_max_pmu_counters(void)
> +{
> +	return u64_get_bits(rmm_feat_reg0, RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS);
> +}
> +
>  u64 kvm_realm_reset_id_aa64dfr0_el1(const struct kvm_vcpu *vcpu, u64 val)
>  {
>  	u32 bps = u64_get_bits(rmm_feat_reg0, RMI_FEATURE_REGISTER_0_NUM_BPS);
> -- 
> 2.43.0
>