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Message-ID: <578818ba-e646-4118-a2c1-54bcf0be4050@intel.com>
Date: Fri, 25 Jul 2025 16:32:07 -0700
From: Reinette Chatre <reinette.chatre@...el.com>
To: Tony Luck <tony.luck@...el.com>, Fenghua Yu <fenghuay@...dia.com>, "Maciej
Wieczor-Retman" <maciej.wieczor-retman@...el.com>, Peter Newman
<peternewman@...gle.com>, James Morse <james.morse@....com>, Babu Moger
<babu.moger@....com>, Drew Fustini <dfustini@...libre.com>, Dave Martin
<Dave.Martin@....com>, Chen Yu <yu.c.chen@...el.com>
CC: <x86@...nel.org>, <linux-kernel@...r.kernel.org>,
<patches@...ts.linux.dev>
Subject: Re: [PATCH v7 13/31] x86,fs/resctrl: Handle events that can be read
from any CPU
Hi Tony,
On 7/11/25 4:53 PM, Tony Luck wrote:
> Resctrl file system code was built with the assumption that monitor
"resctrl assumes that monitor events can only be read from a CPU in the
cpumask_t set of each domain."
> events can only be read from a CPU in the cpumask_t set for each
> domain.
>
> This was true for x86 events accessed with an MSR interface, but may
"This is true ..."
> not be true for other access methods such as MMIO.
>
> Add a flag to struct mon_evt to indicate if the event can be read on
> any CPU.
>
> Architecture uses resctrl_enable_mon_event() to enable an event and
> set the flag appropriately.
>
> Bypass all the smp_call*() code for events that can be read on any CPU
> and call mon_event_count() directly from mon_event_read().
>
> Add a test for events that can be read from any domain to skip checks
> in __mon_event_count() that the read is being done from a CPU in the
> correct domain or cache scope.
>
> Signed-off-by: Tony Luck <tony.luck@...el.com>
> ---
...
> diff --git a/fs/resctrl/monitor.c b/fs/resctrl/monitor.c
> index 6d4191eff391..a6d11011cb8e 100644
> --- a/fs/resctrl/monitor.c
> +++ b/fs/resctrl/monitor.c
> @@ -356,15 +356,43 @@ static struct mbm_state *get_mbm_state(struct rdt_l3_mon_domain *d, u32 closid,
> return state ? &state[idx] : NULL;
> }
>
> +/*
> + * For events that can be read on any CPU this function is called
> + * in preemptible context with a direct call from mon_event_read()
> + * to mon_event_count() instead of using smp_call*() to execute on a
> + * specific CPU. For other events it is called in non-preemptible context.
Thinking about this more there are a few more things involved that makes an
attempt to simplify it to preemptible/non-preemptible not be accurate.
We know from resctrl_arch_rmid_read_context_check() that resctrl_arch_rmid_read()
can (usually) sleep and that is because mon_event_count() is usually called via
smp_call_on_cpu() that runs mon_event_count() in (preemptible but not-migratable)
task context. You can confirm this with a closer look at [1] that shows the
preempt_count() is 0.
Here is an attempt to clarify the context, please consider it critically and
improve:
Called from preemptible context via a direct call of mon_event_count() for
events that can be read on any CPU.
Called from preemptible but non-migratable process context (mon_event_count()
via smp_call_on_cpu()) OR non-preemptible context (mon_event_count() via
smp_call_function_any()) for events that need to be read on a specific CPU.
[1] https://lore.kernel.org/lkml/e818906f-b03a-474b-8a6b-d291cf1a74fe@intel.com/
> + */
> +static bool cpu_on_correct_domain(struct rmid_read *rr)
> +{
> + struct cacheinfo *ci;
> + int cpu;
> +
> + /* Any CPU is OK for this event */
> + if (rr->evt->any_cpu)
> + return true;
> +
> + cpu = smp_processor_id();
> +
> + /* Single domain. Must be on a CPU in that domain. */
> + if (rr->hdr)
> + return cpumask_test_cpu(cpu, &rr->hdr->cpu_mask);
> +
> + /* Summing domains that share a cache, must be on a CPU for that cache. */
> + ci = get_cpu_cacheinfo_level(cpu, RESCTRL_L3_CACHE);
> +
> + return ci && ci->id == rr->ci_id;
> +}
> +
> static int __mon_event_count(u32 closid, u32 rmid, struct rmid_read *rr)
> {
> - int cpu = smp_processor_id();
> struct rdt_l3_mon_domain *d;
> - struct cacheinfo *ci;
> struct mbm_state *m;
> int err, ret;
> u64 tval = 0;
>
> + if (!cpu_on_correct_domain(rr))
> + return -EINVAL;
> +
> if (rr->r->rid == RDT_RESOURCE_L3 && rr->first) {
> if (WARN_ON_ONCE(!domain_header_is_valid(rr->hdr, RESCTRL_MON_DOMAIN,
> RDT_RESOURCE_L3)))
> @@ -378,9 +406,7 @@ static int __mon_event_count(u32 closid, u32 rmid, struct rmid_read *rr)
> }
>
> if (rr->hdr) {
> - /* Reading a single domain, must be on a CPU in that domain. */
> - if (!cpumask_test_cpu(cpu, &rr->hdr->cpu_mask))
> - return -EINVAL;
> + /* Single domain. */
> rr->err = resctrl_arch_rmid_read(rr->r, rr->hdr, closid, rmid,
> rr->evt->evtid, &tval, rr->arch_mon_ctx);
> if (rr->err)
> @@ -394,12 +420,9 @@ static int __mon_event_count(u32 closid, u32 rmid, struct rmid_read *rr)
> if (WARN_ON_ONCE(rr->r->rid != RDT_RESOURCE_L3))
> return -EINVAL;
As I understand the above WARN ensures that only an L3 resource can proceed considering
that the code that follows explicitly uses RESCTRL_L3_CACHE. Now that this hardcoded
RESCTRL_L3_CACHE is moved elsewhere, should the WARN not follow it?
>
> - /* Summing domains that share a cache, must be on a CPU for that cache. */
> - ci = get_cpu_cacheinfo_level(cpu, RESCTRL_L3_CACHE);
> - if (!ci || ci->id != rr->ci_id)
> - return -EINVAL;
> -
> /*
> + * Sum across multiple domains.
> + *
> * Legacy files must report the sum of an event across all
> * domains that share the same L3 cache instance.
> * Report success if a read from any domain succeeds, -EINVAL
Reinette
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