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Message-ID: <20250725152618.32886-2-herve.codina@bootlin.com>
Date: Fri, 25 Jul 2025 17:26:10 +0200
From: Herve Codina <herve.codina@...tlin.com>
To: Hoan Tran <hoan@...amperecomputing.com>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Saravana Kannan <saravanak@...gle.com>,
Serge Semin <fancer.lancer@...il.com>,
Herve Codina <herve.codina@...tlin.com>
Cc: Phil Edworthy <phil.edworthy@...esas.com>,
linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Miquel Raynal <miquel.raynal@...tlin.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: [PATCH 1/6] dt-bindings: gpio: snps,dw-apb: Add support for Renesas RZ/N1
The RZ/N1 SoCs uses the Synopsys DesignWare IP to handle GPIO blocks.
Add RZ/N1 SoC and family compatible strings.
Signed-off-by: Herve Codina <herve.codina@...tlin.com>
---
.../devicetree/bindings/gpio/snps,dw-apb-gpio.yaml | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
index ab2afc0e4153..ceb71b5ac688 100644
--- a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
@@ -20,7 +20,13 @@ properties:
pattern: "^gpio@[0-9a-f]+$"
compatible:
- const: snps,dw-apb-gpio
+ oneOf:
+ - const: snps,dw-apb-gpio
+ - items:
+ - enum:
+ - renesas,r9a06g032-gpio
+ - const: renesas,rzn1-gpio
+ - const: snps,dw-apb-gpio
"#address-cells":
const: 1
--
2.50.1
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